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| author | liuhongt <hongtao.liu@intel.com> | 2023-11-17 10:18:33 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2023-11-22 14:01:10 +0800 |
| commit | 2e51fff7ce02a6105aa1acff57cbbdd8a767a33f (patch) | |
| tree | bd747ae2a0b5b74fc50fec1d4cb7509d90f275a5 | |
| parent | f4c53580f3aba1343ca77756078722bb07f8118a (diff) | |
| download | gcc-2e51fff7ce02a6105aa1acff57cbbdd8a767a33f.zip gcc-2e51fff7ce02a6105aa1acff57cbbdd8a767a33f.tar.gz gcc-2e51fff7ce02a6105aa1acff57cbbdd8a767a33f.tar.bz2 | |
Support cbranchm for Vector HI/QImode.
gcc/ChangeLog:
* config/i386/sse.md (cbranch<mode>4): Extend to Vector
HI/QImode.
| -rw-r--r-- | gcc/config/i386/sse.md | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f94a77d..4f51169 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -514,6 +514,12 @@ (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX2") V4SI (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX2") V2DI]) +(define_mode_iterator VI_AVX_AVX512F + [(V64QI "TARGET_AVX512F && TARGET_EVEX512") (V32QI "TARGET_AVX") V16QI + (V32HI "TARGET_AVX512F && TARGET_EVEX512") (V16HI "TARGET_AVX") V8HI + (V16SI "TARGET_AVX512F && TARGET_EVEX512") (V8SI "TARGET_AVX") V4SI + (V8DI "TARGET_AVX512F && TARGET_EVEX512") (V4DI "TARGET_AVX") V2DI]) + ;; All QImode vector integer modes (define_mode_iterator VI1 [(V32QI "TARGET_AVX") V16QI]) @@ -27910,8 +27916,8 @@ (define_expand "cbranch<mode>4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:VI48_AVX_AVX512F 1 "register_operand") - (match_operand:VI48_AVX_AVX512F 2 "nonimmediate_operand"))) + (compare:CC (match_operand:VI_AVX_AVX512F 1 "register_operand") + (match_operand:VI_AVX_AVX512F 2 "nonimmediate_operand"))) (set (pc) (if_then_else (match_operator 0 "bt_comparison_operator" [(reg:CC FLAGS_REG) (const_int 0)]) |