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| author | Richard Kenner <kenner@gcc.gnu.org> | 1994-05-31 17:16:25 -0400 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1994-05-31 17:16:25 -0400 |
| commit | 2bee044942515a73cab6f6f71593cc145235a132 (patch) | |
| tree | 75f8c66cc8dce561bbba1c675fd6f0a916b613f4 | |
| parent | 7efad3f776363669abf4fd7c94777f20f59fa4ec (diff) | |
| download | gcc-2bee044942515a73cab6f6f71593cc145235a132.zip gcc-2bee044942515a73cab6f6f71593cc145235a132.tar.gz gcc-2bee044942515a73cab6f6f71593cc145235a132.tar.bz2 | |
(extendqidi2, extendqisi2, extendqihi2): Remove non-existent lba instruction.
(ashrdi3): Undo previous change.
From-SVN: r7397
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 54 |
1 files changed, 17 insertions, 37 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 63ac41b..1872dff 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -287,20 +287,11 @@ "rldicl. %0,%1,0,56" [(set_attr "type" "compare")]) -(define_expand "extendqidi2" - [(set (match_operand:DI 0 "gpc_reg_operand" "") - (sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "")))] +(define_insn "extendqidi2" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r")))] "TARGET_POWERPC64" - "") - -(define_insn "" - [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") - (sign_extend:DI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))] - "TARGET_POWERPC64" - "@ - lba%U1%X1 %0,%1 - extsb %0,%1" - [(set_attr "type" "load,*")]) + "extsb %0,%1") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -507,13 +498,10 @@ }") (define_insn "extendqisi2_ppc" - [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") - (sign_extend:SI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))] + [(set (match_operand:SI 0 "gpc_reg_operand" "=r") + (sign_extend:SI (match_operand:QI 1 "gpc_reg_operand" "r")))] "TARGET_POWERPC" - "@ - lba%U1%X1 %0,%1 - extsb %0,%1" - [(set_attr "type" "load,*")]) + "extsb %0,%1") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -610,13 +598,10 @@ }") (define_insn "extendqihi2_ppc" - [(set (match_operand:HI 0 "gpc_reg_operand" "=r,r") - (sign_extend:HI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))] + [(set (match_operand:HI 0 "gpc_reg_operand" "=r") + (sign_extend:HI (match_operand:QI 1 "gpc_reg_operand" "r")))] "TARGET_POWERPC" - "@ - lba%U1%X1 %0,%1 - extsb %0,%1" - [(set_attr "type" "load,*")]) + "extsb %0,%1") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -3390,22 +3375,17 @@ ;; just handle shifts by constants. (define_expand "ashrdi3" - [(set (match_operand:DI 0 "gpc_reg_operand" "") - (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "") - (match_operand:SI 2 "reg_or_cint_operand" "")))] - "" + [(parallel [(set (match_operand:DI 0 "gpc_reg_operand" "=") + (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "") + (match_operand:SI 2 "general_operand" ""))) + (clobber (match_scratch:SI 3 ""))])] + "TARGET_POWER" " -{ - if (TARGET_POWER && GET_CODE (operands[2]) != CONST_INT) - { - emit_insn (gen_ashrdi3_power (operands[0], operands[1], operands[2])); - DONE; - } - else if (! TARGET_POWERPC64) +{ if (GET_CODE (operands[2]) != CONST_INT) FAIL; }") -(define_insn "ashrdi3_power" +(define_insn "" [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "const_int_operand" "M,i"))) |