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authorAndrew Carlotti <andrew.carlotti@arm.com>2024-04-03 23:53:52 +0100
committerAndrew Carlotti <andrew.carlotti@arm.com>2024-04-11 15:26:47 +0100
commit27e34311760456683d8316532dc57db24b3f410b (patch)
tree672f24c7584860d8e655d50c1b3f2c77c5216c78
parenta28df11276647da16316d0621cb69ff5f878cd91 (diff)
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aarch64: Remove unsupported FMV features
It currently isn't possible to support function multiversioning features properly in GCC without also enabling the extension in the command line options (with the exception of features such as "rpres" that do not require assembler support). We therefore remove unsupported features from GCC's list of FMV features. Some of these features ("fcma", "jscvt", "frintts", "flagm2", "wfxt", "rcpc2", and perhaps "dpb" and "dpb2") will be added back in the future once support for the command line option has been added. The rest of the removed features I have proposed removing from the ACLE specification as well, since it doesn't seem worthwhile to include support for them; see the ACLE pull request for more detailed justification: https://github.com/ARM-software/acle/pull/315 gcc/ChangeLog: * config/aarch64/aarch64-option-extensions.def: Remove "flagm2", "sha1", "pmull", "dit", "dpb", "dpb2", "jscvt", "fcma", "rcpc2", "frintts", "dgh", "ebf16", "sve-bf16", "sve-ebf16", "sve-i8mm", "sve2-pmull128", "memtag3", "bti" and "wfxt" entries.
-rw-r--r--gcc/config/aarch64/aarch64-option-extensions.def38
1 files changed, 0 insertions, 38 deletions
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index b7b307b..54bbf9c 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -103,8 +103,6 @@ AARCH64_OPT_FMV_EXTENSION("rng", RNG, (), (), (), "rng")
AARCH64_OPT_FMV_EXTENSION("flagm", FLAGM, (), (), (), "flagm")
-AARCH64_FMV_FEATURE("flagm2", FLAGM2, (FLAGM))
-
AARCH64_OPT_FMV_EXTENSION("lse", LSE, (), (), (), "atomics")
AARCH64_OPT_FMV_EXTENSION("fp", FP, (), (), (), "fp")
@@ -124,16 +122,12 @@ AARCH64_FMV_FEATURE("rdm", RDM, (RDMA))
AARCH64_OPT_FMV_EXTENSION("crc", CRC, (), (), (), "crc32")
-AARCH64_FMV_FEATURE("sha1", SHA1, ())
-
AARCH64_OPT_FMV_EXTENSION("sha2", SHA2, (SIMD), (), (), "sha1 sha2")
AARCH64_FMV_FEATURE("sha3", SHA3, (SHA3))
AARCH64_OPT_FMV_EXTENSION("aes", AES, (SIMD), (), (), "aes")
-AARCH64_FMV_FEATURE("pmull", PMULL, ())
-
/* +nocrypto disables AES, SHA2 and SM4, and anything that depends on them
(such as SHA3 and the SVE2 crypto extensions). */
AARCH64_OPT_EXTENSION("crypto", CRYPTO, (AES, SHA2), (), (AES, SHA2, SM4),
@@ -157,44 +151,20 @@ AARCH64_OPT_EXTENSION("fp16fml", F16FML, (), (F16), (), "asimdfhm")
AARCH64_FMV_FEATURE("fp16fml", FP16FML, (F16FML))
-AARCH64_FMV_FEATURE("dit", DIT, ())
-
-AARCH64_FMV_FEATURE("dpb", DPB, ())
-
-AARCH64_FMV_FEATURE("dpb2", DPB2, ())
-
-AARCH64_FMV_FEATURE("jscvt", JSCVT, ())
-
-AARCH64_FMV_FEATURE("fcma", FCMA, (SIMD))
-
AARCH64_OPT_FMV_EXTENSION("rcpc", RCPC, (), (), (), "lrcpc")
-AARCH64_FMV_FEATURE("rcpc2", RCPC2, (RCPC))
-
AARCH64_OPT_FMV_EXTENSION("rcpc3", RCPC3, (), (), (), "lrcpc3")
-AARCH64_FMV_FEATURE("frintts", FRINTTS, ())
-
-AARCH64_FMV_FEATURE("dgh", DGH, ())
-
AARCH64_OPT_FMV_EXTENSION("i8mm", I8MM, (SIMD), (), (), "i8mm")
/* An explicit +bf16 implies +simd, but +bf16+nosimd still enables scalar BF16
instructions. */
AARCH64_OPT_FMV_EXTENSION("bf16", BF16, (FP), (SIMD), (), "bf16")
-AARCH64_FMV_FEATURE("ebf16", EBF16, (BF16))
-
AARCH64_FMV_FEATURE("rpres", RPRES, ())
AARCH64_OPT_FMV_EXTENSION("sve", SVE, (SIMD, F16), (), (), "sve")
-AARCH64_FMV_FEATURE("sve-bf16", SVE_BF16, (SVE, BF16))
-
-AARCH64_FMV_FEATURE("sve-ebf16", SVE_EBF16, (SVE, BF16))
-
-AARCH64_FMV_FEATURE("sve-i8mm", SVE_I8MM, (SVE, I8MM))
-
AARCH64_OPT_EXTENSION("f32mm", F32MM, (SVE), (), (), "f32mm")
AARCH64_FMV_FEATURE("f32mm", SVE_F32MM, (F32MM))
@@ -209,8 +179,6 @@ AARCH64_OPT_EXTENSION("sve2-aes", SVE2_AES, (SVE2, AES), (), (), "sveaes")
AARCH64_FMV_FEATURE("sve2-aes", SVE_AES, (SVE2_AES))
-AARCH64_FMV_FEATURE("sve2-pmull128", SVE_PMULL128, (SVE2))
-
AARCH64_OPT_EXTENSION("sve2-bitperm", SVE2_BITPERM, (SVE2), (), (),
"svebitperm")
@@ -230,8 +198,6 @@ AARCH64_OPT_FMV_EXTENSION("memtag", MEMTAG, (), (), (), "")
AARCH64_FMV_FEATURE("memtag2", MEMTAG2, (MEMTAG))
-AARCH64_FMV_FEATURE("memtag3", MEMTAG3, (MEMTAG))
-
AARCH64_OPT_FMV_EXTENSION("sb", SB, (), (), (), "sb")
AARCH64_OPT_FMV_EXTENSION("predres", PREDRES, (), (), (), "")
@@ -240,8 +206,6 @@ AARCH64_OPT_FMV_EXTENSION("ssbs", SSBS, (), (), (), "ssbs")
AARCH64_FMV_FEATURE("ssbs2", SSBS2, (SSBS))
-AARCH64_FMV_FEATURE("bti", BTI, ())
-
AARCH64_OPT_EXTENSION("profile", PROFILE, (), (), (), "")
AARCH64_OPT_EXTENSION("tme", TME, (), (), (), "")
@@ -256,8 +220,6 @@ AARCH64_FMV_FEATURE("ls64_v", LS64_V, ())
AARCH64_FMV_FEATURE("ls64_accdata", LS64_ACCDATA, (LS64))
-AARCH64_FMV_FEATURE("wfxt", WFXT, ())
-
AARCH64_OPT_EXTENSION("sme-f64f64", SME_F64F64, (SME), (), (), "")
AARCH64_FMV_FEATURE("sme-f64f64", SME_F64, (SME_F64F64))