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authorJames Greenhalgh <james.greenhalgh@arm.com>2013-11-14 09:58:37 +0000
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>2013-11-14 09:58:37 +0000
commit1763249f27bf95ffd54f1f3d9f3adfa659e79ccb (patch)
tree77d6a8bc41e3dda7dcb88c270b9fc398fb058558
parent02fdbd5beb0212b36d6c0afc473e9082ce74c696 (diff)
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[AArch64] [-mtune cleanup 3/5] [Temporary] When asked to tune for
Cortex-A57, tune for Cortex-A15 gcc/ * config/aarch64/aarch64-cores.def (cortex-a57): Tune for cortexa15. * config/aarch64/aarch64-tune.md: Regenerate. * config/aarch64/aarch64.md: Include cortex-a15 pipeline model. (generic_sched): "no" if we are tuning for cortexa15. * config/arm/cortex-a15.md: Include cortex-a15-neon.md by relative path. From-SVN: r204783
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/aarch64/aarch64-cores.def2
-rw-r--r--gcc/config/aarch64/aarch64-tune.md2
-rw-r--r--gcc/config/aarch64/aarch64.md3
-rw-r--r--gcc/config/arm/cortex-a15.md2
5 files changed, 14 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b49dcf2..9a6ee76 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,14 @@
2013-11-14 James Greenhalgh <james.greenhalgh@arm.com>
+ * config/aarch64/aarch64-cores.def (cortex-a57): Tune for cortexa15.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * config/aarch64/aarch64.md: Include cortex-a15 pipeline model.
+ (generic_sched): "no" if we are tuning for cortexa15.
+ * config/arm/cortex-a15.md: Include cortex-a15-neon.md by
+ relative path.
+
+2013-11-14 James Greenhalgh <james.greenhalgh@arm.com>
+
* config/aarch64/aarch64-arches.def (armv8-a): Tune for cortex-a53.
* config/aarch64/aarch64.md: Do not include aarch64-generic.md.
* config/aarch64/aarch64.c (aarch64_tune): Initialize to cortexa53.
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index c840aa0..1845358 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -35,6 +35,6 @@
therefore serves as a template for adding more CPUs in the future. */
AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, generic)
-AARCH64_CORE("cortex-a57", cortexa57, 8, AARCH64_FL_FPSIMD, generic)
+AARCH64_CORE("cortex-a57", cortexa15, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index 02699e3..1bde99b 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa53,cortexa57,large,small"
+ "cortexa53,cortexa15,large,small"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index d66b41d..6f828e2 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -312,7 +312,7 @@
(define_attr "generic_sched" "yes,no"
(const (if_then_else
- (eq_attr "tune" "large,small,cortexa53")
+ (eq_attr "tune" "large,small,cortexa53,cortexa15")
(const_string "no")
(const_string "yes"))))
@@ -320,6 +320,7 @@
(include "large.md")
(include "small.md")
(include "../arm/cortex-a53.md")
+(include "../arm/cortex-a15.md")
;; -------------------------------------------------------------------
;; Jumps and other miscellaneous insns
diff --git a/gcc/config/arm/cortex-a15.md b/gcc/config/arm/cortex-a15.md
index ccad620..5a31a09 100644
--- a/gcc/config/arm/cortex-a15.md
+++ b/gcc/config/arm/cortex-a15.md
@@ -158,7 +158,7 @@
"ca15_issue2,ca15_ls1+ca15_ls2,ca15_str,ca15_str")
;; We include Neon.md here to ensure that the branch can block the Neon units.
-(include "cortex-a15-neon.md")
+(include "../arm/cortex-a15-neon.md")
;; We lie with calls. They take up all issue slots, and form a block in the
;; pipeline. The result however is available the next cycle.