diff options
| author | Richard Sandiford <richard@codesourcery.com> | 2007-04-01 11:23:54 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2007-04-01 11:23:54 +0000 |
| commit | 1732457d7f4e10944f15e4fe7c5943818d81a006 (patch) | |
| tree | f3beda1fc6d7a4561745b16ef9bd5a83fdaf23a0 | |
| parent | 4719fc489ca9ce82d20ac68c9e7d82ca5116693b (diff) | |
| download | gcc-1732457d7f4e10944f15e4fe7c5943818d81a006.zip gcc-1732457d7f4e10944f15e4fe7c5943818d81a006.tar.gz gcc-1732457d7f4e10944f15e4fe7c5943818d81a006.tar.bz2 | |
re PR target/31388 (ICE building libiberty multilib for mips16 multilibs)
gcc/
PR target/31388
* config/mips/mips.md (load_const_gp): New insn.
* config/mips/mips.c (mips_split_symbol): Avoid using or creating
the MIPS16 GP pseudo register if no_new_pseudos.
(mips16_gp_pseudo_reg): Use gen_load_const_gp.
From-SVN: r123398
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 19 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 5 |
3 files changed, 22 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 91ab03c..7d8f39b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2007-04-01 Richard Sandiford <richard@codesourcery.com> + + PR target/31388 + * config/mips/mips.md (load_const_gp): New insn. + * config/mips/mips.c (mips_split_symbol): Avoid using or creating + the MIPS16 GP pseudo register if no_new_pseudos. + (mips16_gp_pseudo_reg): Use gen_load_const_gp. + 2007-03-31 Andrew Pinski <andrew_pinski@playstation.sony.com> PR target/31364 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 7203a83..4c0ce09 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1888,10 +1888,15 @@ mips_split_symbol (rtx temp, rtx addr) { rtx high; - if (TARGET_MIPS16) - high = mips16_gp_pseudo_reg (); - else + if (!TARGET_MIPS16) high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr))); + else if (no_new_pseudos) + { + emit_insn (gen_load_const_gp (copy_rtx (temp))); + high = temp; + } + else + high = mips16_gp_pseudo_reg (); return gen_rtx_LO_SUM (Pmode, high, addr); } @@ -7808,19 +7813,13 @@ mips16_gp_pseudo_reg (void) { if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX) { - rtx unspec; rtx insn, scan; cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode); /* We want to initialize this to a value which gcc will believe is constant. */ - start_sequence (); - unspec = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx), UNSPEC_GP); - emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx, - gen_rtx_CONST (Pmode, unspec)); - insn = get_insns (); - end_sequence (); + insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); push_topmost_sequence (); /* We need to emit the initialization after the FUNCTION_BEG diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 9d07cec..cfe7150 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4074,6 +4074,11 @@ [(set_attr "type" "mfc") (set_attr "mode" "SF")]) +;; Move a constant that satisfies CONST_GP_P into operand 0. +(define_expand "load_const_gp" + [(set (match_operand 0 "register_operand" "=d") + (const (unspec [(const_int 0)] UNSPEC_GP)))]) + ;; Insn to initialize $gp for n32/n64 abicalls. Operand 0 is the offset ;; of _gp from the start of this function. Operand 1 is the incoming ;; function address. |