diff options
author | Palmer Dabbelt <palmer@rivosinc.com> | 2023-12-12 19:54:05 -0800 |
---|---|---|
committer | Patrick O'Neill <patrick@rivosinc.com> | 2024-01-24 16:37:15 -0800 |
commit | 0d1b0f2ad391217a43e9239ca017958f89e8f076 (patch) | |
tree | 990f20294492788da7733cf84130bf067e4f28b9 | |
parent | 2a9637b229f64775d82fb5917f83f71e8ad1911d (diff) | |
download | gcc-0d1b0f2ad391217a43e9239ca017958f89e8f076.zip gcc-0d1b0f2ad391217a43e9239ca017958f89e8f076.tar.gz gcc-0d1b0f2ad391217a43e9239ca017958f89e8f076.tar.bz2 |
RISC-V: Don't make Ztso imply A
I can't actually find anything in the ISA manual that makes Ztso imply
A. In theory the memory ordering is just a different thing that the set
of availiable instructions (ie, Ztso without A would still imply TSO for
loads and stores). It also seems like a configuration that could be
sane to build: without A it's all but impossible to write any meaningful
multi-core code, and TSO is really cheap for a single core.
That said, I think it's kind of reasonable to provide A to users asking
for Ztso. So maybe even if this was a mistake it's the right thing to
do?
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (riscv_implied_info):
Remove {"ztso", "a"}.
-rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index 4da7f37..0a3c5cd 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -96,8 +96,6 @@ static const riscv_implied_info_t riscv_implied_info[] = {"zks", "zksed"}, {"zks", "zksh"}, - {"ztso", "a"}, - {"v", "zvl128b"}, {"v", "zve64d"}, |