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| author | Jeff Law <law@gcc.gnu.org> | 1997-03-20 09:00:49 -0700 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1997-03-20 09:00:49 -0700 |
| commit | 09ece7b5287a98e6952e05afe5652575dd755a05 (patch) | |
| tree | 6ca402aa2668332c80822d26f4daf9c18633e5aa | |
| parent | 52320a474f6819a407e2be7321551fff49879755 (diff) | |
| download | gcc-09ece7b5287a98e6952e05afe5652575dd755a05.zip gcc-09ece7b5287a98e6952e05afe5652575dd755a05.tar.gz gcc-09ece7b5287a98e6952e05afe5652575dd755a05.tar.bz2 | |
pa.c (emit_move_sequence): Don't lose for a secondary reload to the SAR register if...
* pa/pa.c (emit_move_sequence): Don't lose for a secondary reload
to the SAR register if the input is a MEM with an offset that won't
fit in 14bits.
From-SVN: r13753
| -rw-r--r-- | gcc/config/pa/pa.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 221166f..5f94160 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -1170,7 +1170,21 @@ emit_move_sequence (operands, mode, scratch_reg) && FP_REG_CLASS_P (REGNO_REG_CLASS (REGNO (operand1))))) && scratch_reg) { - emit_move_insn (scratch_reg, operand1); + /* D might not fit in 14 bits either; for such cases load D into + scratch reg. */ + if (GET_CODE (operand1) == MEM + && !memory_address_p (SImode, XEXP (operand1, 0))) + { + emit_move_insn (scratch_reg, XEXP (XEXP (operand1, 0), 1)); + emit_move_insn (scratch_reg, gen_rtx (GET_CODE (XEXP (operand1, 0)), + SImode, + XEXP (XEXP (operand1, 0), 0), + scratch_reg)); + emit_move_insn (scratch_reg, gen_rtx (MEM, GET_MODE (operand1), + scratch_reg)); + } + else + emit_move_insn (scratch_reg, operand1); emit_move_insn (operand0, scratch_reg); return 1; } |