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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-04-18 12:03:43 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-04-20 12:45:25 +0100 |
| commit | 09751f52bfa6757405c85faede627129fdd0884f (patch) | |
| tree | bde8cf11603ab1d1b15818e00aedc4502e93c82e | |
| parent | 1edcb2ea0eb29f1a85cd9ba7bb933c4a260cba44 (diff) | |
| download | gcc-09751f52bfa6757405c85faede627129fdd0884f.zip gcc-09751f52bfa6757405c85faede627129fdd0884f.tar.gz gcc-09751f52bfa6757405c85faede627129fdd0884f.tar.bz2 | |
amdgcn: update target-supports.exp
The backend can now vectorize more things.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_vect_call_copysignf): Add amdgcn.
(check_effective_target_vect_call_sqrtf): Add amdgcn.
(check_effective_target_vect_call_ceilf): Add amdgcn.
(check_effective_target_vect_call_floor): Add amdgcn.
(check_effective_target_vect_logical_reduc): Add amdgcn.
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index ad68af5..868e2c4 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8555,7 +8555,8 @@ proc check_effective_target_vect_call_copysignf { } { return [check_cached_effective_target_indexed vect_call_copysignf { expr { [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget powerpc*-*-*] - || [istarget aarch64*-*-*] }}] + || [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports hardware square root instructions. @@ -8591,7 +8592,8 @@ proc check_effective_target_vect_call_sqrtf { } { || [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) || ([istarget s390*-*-*] - && [check_effective_target_s390_vx]) }}] + && [check_effective_target_s390_vx]) + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector lrint calls. @@ -8636,14 +8638,16 @@ proc check_effective_target_vect_call_ceil { } { proc check_effective_target_vect_call_ceilf { } { return [check_cached_effective_target_indexed vect_call_ceilf { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floor calls. proc check_effective_target_vect_call_floor { } { return [check_cached_effective_target_indexed vect_call_floor { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floorf calls. @@ -8699,7 +8703,8 @@ proc check_effective_target_vect_call_roundf { } { # Return 1 if the target supports AND, OR and XOR reduction. proc check_effective_target_vect_logical_reduc { } { - return [check_effective_target_aarch64_sve] + return [expr { [check_effective_target_aarch64_sve] + || [istarget amdgcn-*-*] }] } # Return 1 if the target supports the fold_extract_last optab. |