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| author | Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> | 2024-10-24 20:06:21 +0200 |
|---|---|---|
| committer | Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> | 2024-11-04 20:17:38 +0100 |
| commit | e3f2db9ef424ef3fb819f1ad91db79893c31ba6d (patch) | |
| tree | bf54763e5014583184125b5c62c8eda5760cad53 | |
| parent | 56acc9498ebce94f902dccd82eefdac36f08fc38 (diff) | |
| download | gcc-e3f2db9ef424ef3fb819f1ad91db79893c31ba6d.zip gcc-e3f2db9ef424ef3fb819f1ad91db79893c31ba6d.tar.gz gcc-e3f2db9ef424ef3fb819f1ad91db79893c31ba6d.tar.bz2 | |
testsuite: arm: Update expected asm in armv8_2-fp16-neon-2.c
With the changes in r15-1579-g792f97b44ff, the test_vmul_n_16x8 function
does not contain any vdup.16 q* r* instruction with -mfloat-abi=softfp.
The differnce between r15-1578-g5185274c76c and r15-1579-g792f97b44ff
with -mfloat-abi=softfp for the function is:
.global test_vmul_n_16x8
.syntax unified
.arm
.type test_vmul_n_16x8, %function
test_vmul_n_16x8:
@ args = 4, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
vmov d16, r0, r1 @ v8hf
vmov d17, r2, r3
- ldrh r3, [sp] @ __fp16
- vdup.16 q9, r3
+ vld1.16 {d18[], d19[]}, [sp]
vmul.f16 q8, q9, q8
vmov r0, r1, d16 @ v8hf
vmov r2, r3, d17
bx lr
.size test_vmul_n_16x8, .-test_vmul_n_16x8
gcc/testsuite/ChangeLog:
* gcc.target/arm/armv8_2-fp16-neon-2.c: Expect 3 vdup.16 q* r*
when in arm_hf_eabi else 2.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c index 6808576..d65f687 100644 --- a/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c +++ b/gcc/testsuite/gcc.target/arm/armv8_2-fp16-neon-2.c @@ -400,7 +400,8 @@ test_vdupq_n_f16 (float16_t a) { return vdupq_n_f16 (a); } -/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 } } */ +/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 3 { target arm_hf_eabi } } } */ +/* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 { target { ! arm_hf_eabi } } } } */ float16x4_t test_vdup_lane_f16 (float16x4_t a) |