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author | John David Anglin <danglin@gcc.gnu.org> | 2024-08-06 13:40:26 -0400 |
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committer | John David Anglin <danglin@gcc.gnu.org> | 2024-08-06 13:40:26 -0400 |
commit | dc01f249db5c4d08b76dc2783b1539290a800f2d (patch) | |
tree | c7c24581f1461d44c57c77f75973f14b2ba593a6 | |
parent | 6b8e46d93a76055087071204fe5ae1dfbf5ef613 (diff) | |
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hppa: Fix (plus (plus (mult (a) (mem_shadd_constant)) (b)) (c)) optimization
The constant C must be an integral multiple of the shift value in
the above optimization. Non integral values can occur evaluating
IMAGPART_EXPR when the shadd constant is 8 and we have SFmode.
2024-08-06 John David Anglin <danglin@gcc.gnu.org>
gcc/ChangeLog:
PR target/113384
* config/pa/pa.cc (hppa_legitimize_address): Add check to
ensure constant is an integral multiple of shift the value.
-rw-r--r-- | gcc/config/pa/pa.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index ab4bfc5..911b7d9 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -1410,6 +1410,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* If the index adds a large constant, try to scale the constant so that it can be loaded with only one insn. */ if (GET_CODE (XEXP (idx, 1)) == CONST_INT + && INTVAL (XEXP (idx, 1)) % (1 << shift_val) == 0 && VAL_14_BITS_P (INTVAL (XEXP (idx, 1)) / INTVAL (XEXP (XEXP (idx, 0), 1))) && INTVAL (XEXP (idx, 1)) % INTVAL (XEXP (XEXP (idx, 0), 1)) == 0) |