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| author | Uros Bizjak <ubizjak@gmail.com> | 2019-06-26 21:12:27 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2019-06-26 21:12:27 +0200 |
| commit | 9f962469cabc7fdc2ee830125a5cb4e61e1632e4 (patch) | |
| tree | f9e5afb71b48f830418d4cd8a2f6f1475f769cae | |
| parent | 9ff33839fc46e2d3f5ff36870e8000f2f15846e9 (diff) | |
| download | gcc-9f962469cabc7fdc2ee830125a5cb4e61e1632e4.zip gcc-9f962469cabc7fdc2ee830125a5cb4e61e1632e4.tar.gz gcc-9f962469cabc7fdc2ee830125a5cb4e61e1632e4.tar.bz2 | |
re PR target/89021 (Implement mmintrin.h in SSE)
PR target/89021
* config/i386/i386.c (ix86_autovectorize_vector_sizes):
Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE.
testsuite/ChangeLog:
PR target/89021
* lib/target-supports.exp (available_vector_sizes)
<[istarget i?86-*-*] || [istarget x86_64-*-*]>: Add
64-bit vectors for !ia32.
From-SVN: r272711
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 11 |
4 files changed, 26 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cdfc9f9..a27a189 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-06-26 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89021 + * config/i386/i386.c (ix86_autovectorize_vector_sizes): + Autovectorize 8-byte vectors for TARGET_MMX_WITH_SSE. + 2019-06-26 Iain Sandoe <iain@sandoe.co.uk> * config/rs6000/rs6000-internal.h (branch_island): New typedef. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1ca1712..7d6280b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21401,6 +21401,11 @@ ix86_autovectorize_vector_sizes (vector_sizes *sizes, bool all) sizes->safe_push (16); sizes->safe_push (32); } + else if (TARGET_MMX_WITH_SSE) + sizes->safe_push (16); + + if (TARGET_MMX_WITH_SSE) + sizes->safe_push (8); } /* Implemenation of targetm.vectorize.get_mask_mode. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index eb9f6cc..e9fade5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2019-06-26 Uroš Bizjak <ubizjak@gmail.com> + + PR target/89021 + * lib/target-supports.exp (available_vector_sizes) + <[istarget i?86-*-*] || [istarget x86_64-*-*]>: Add + 64-bit vectors for !ia32. + 2019-06-26 Jeff Law <law@redhat.com> * gcc.c-torture/execute/builtins/builtins.exp: Add -fno-tree-dse diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 1d4aaa2..285c32f 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -6603,9 +6603,14 @@ proc available_vector_sizes { } { } elseif { [istarget arm*-*-*] && [check_effective_target_arm_neon_ok] } { lappend result 128 64 - } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*]) - && ([check_avx_available] && ![check_prefer_avx128])) } { - lappend result 256 128 + } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } { + if { [check_avx_available] && ![check_prefer_avx128] } { + lappend result 256 + } + lappend result 128 + if { ![is-effective-target ia32] } { + lappend result 64 + } } elseif { [istarget sparc*-*-*] } { lappend result 64 } else { |