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| author | Patrick O'Neill <patrick@rivosinc.com> | 2023-04-21 13:11:35 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-05-02 13:08:03 -0700 |
| commit | 4990cf84c460f064d6281d0813f20b0ef20c7448 (patch) | |
| tree | 6e2529668ec14ab1514ecb7ecdd95f8e2a07f182 | |
| parent | dcd7b2f5f7233a04c8b14b362d0befa76e9654c0 (diff) | |
| download | gcc-4990cf84c460f064d6281d0813f20b0ef20c7448.zip gcc-4990cf84c460f064d6281d0813f20b0ef20c7448.tar.gz gcc-4990cf84c460f064d6281d0813f20b0ef20c7448.tar.bz2 | |
RISC-V: Enforce subword atomic LR/SC SEQ_CST
Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
gcc/ChangeLog:
* config/riscv/sync.md: Change LR.aq/SC.rl pairs into
sequentially consistent LR.aqrl/SC.rl pairs.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
| -rw-r--r-- | gcc/config/riscv/sync.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 1927452..0c83ef0 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -109,7 +109,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "<insn>\t%5, %0, %2\;" "and\t%5, %5, %3\;" "and\t%6, %0, %4\;" @@ -173,7 +173,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%5, %0, %2\;" "not\t%5, %5\;" "and\t%5, %5, %3\;" @@ -278,7 +278,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%4, %0, %3\;" "or\t%4, %4, %2\;" "sc.w.rl\t%4, %4, %1\;" @@ -443,7 +443,7 @@ "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC" { return "1:\;" - "lr.w.aq\t%0, %1\;" + "lr.w.aqrl\t%0, %1\;" "and\t%6, %0, %4\;" "bne\t%6, %z2, 1f\;" "and\t%6, %0, %5\;" |