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authorHaochen Gui <guihaoc@gcc.gnu.org>2024-08-15 13:43:28 +0800
committerHaochen Gui <guihaoc@gcc.gnu.org>2024-08-15 13:43:28 +0800
commit08108d57246210de7d5a00b1967dab7102d356bc (patch)
treee3328abe0cfd95a6e13515c3d5d593f08e52b9e5
parent44eb45c2ef7192eb6a811fd46fcb2c7fbeb6f865 (diff)
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rs6000: Implement optab_isnormal for SFDF and IEEE128
gcc/ PR target/97786 * config/rs6000/vsx.md (isnormal<mode>2): New expand. gcc/testsuite/ PR target/97786 * gcc.target/powerpc/pr97786-7.c: New test. * gcc.target/powerpc/pr97786-8.c: New test.
-rw-r--r--gcc/config/rs6000/vsx.md18
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr97786-7.c17
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr97786-8.c12
3 files changed, 47 insertions, 0 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 0f18fd5..705e70b 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5385,6 +5385,24 @@
DONE;
})
+(define_expand "isnormal<mode>2"
+ [(use (match_operand:SI 0 "gpc_reg_operand"))
+ (use (match_operand:IEEE_FP 1 "<fp_register_op>"))]
+ "TARGET_P9_VECTOR
+ && (!FLOAT128_IEEE_P (<MODE>mode) || TARGET_FLOAT128_HW)"
+{
+ rtx tmp = gen_reg_rtx (SImode);
+ /* It is neither NAN, infinite, zero, nor denormal. */
+ int mask = VSX_TEST_DATA_CLASS_NAN
+ | VSX_TEST_DATA_CLASS_POS_INF | VSX_TEST_DATA_CLASS_NEG_INF
+ | VSX_TEST_DATA_CLASS_POS_ZERO | VSX_TEST_DATA_CLASS_NEG_ZERO
+ | VSX_TEST_DATA_CLASS_POS_DENORMAL
+ | VSX_TEST_DATA_CLASS_NEG_DENORMAL;
+ emit_insn (gen_xststdc_<mode> (tmp, operands[1], GEN_INT (mask)));
+ emit_insn (gen_xorsi3 (operands[0], tmp, const1_rtx));
+ DONE;
+})
+
;; The VSX Scalar Test Negative Quad-Precision
(define_expand "xststdcnegqp_<mode>"
[(set (match_dup 2)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-7.c b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c
new file mode 100644
index 0000000..eb01eed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr97786-7.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target powerpc_vsx } */
+
+int test1 (double x)
+{
+ return __builtin_isnormal (x);
+}
+
+int test2 (float x)
+{
+ return __builtin_isnormal (x);
+}
+
+/* { dg-final { scan-assembler-not {\mfcmp} } } */
+/* { dg-final { scan-assembler-times {\mxststdcsp\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mxststdcdp\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr97786-8.c b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c
new file mode 100644
index 0000000..eba90d3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr97786-8.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target ppc_float128_hw } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9 -mabi=ieeelongdouble -Wno-psabi" } */
+/* { dg-require-effective-target powerpc_vsx } */
+
+int test1 (long double x)
+{
+ return __builtin_isnormal (x);
+}
+
+/* { dg-final { scan-assembler-not {\mxscmpuqp\M} } } */
+/* { dg-final { scan-assembler {\mxststdcqp\M} } } */