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authorKazu Hirata <kazu@cs.umass.edu>2004-02-22 22:33:12 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2004-02-22 22:33:12 +0000
commitfcfcb20e67503c4eaaefa6b75efb99f88b827d93 (patch)
treea7baea009885f571a8d76471ba5734b8eaf626c9
parent56d03a4010155be19d3f44e6410a16afd3b58f4e (diff)
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* reorg.c: Remove comments about dead ports.
From-SVN: r78280
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/reorg.c13
2 files changed, 6 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3c1ef94..e0d0323 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2004-02-22 Kazu Hirata <kazu@cs.umass.edu>
+
+ * reorg.c: Remove comments about dead ports.
+
2004-02-22 Christopher Faylor <cgf@redhat.com>
* config.gcc (i[34567]86-*-pe|i[34567]86-*-cygwin*): *Really* specify
diff --git a/gcc/reorg.c b/gcc/reorg.c
index e4585c9..cab9d46 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -36,19 +36,11 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
cycle, and the Branch Penalty is 0. Several RISC machines approach
branch delays differently:
- The MIPS and AMD 29000 have a single branch delay slot. Most insns
+ The MIPS has a single branch delay slot. Most insns
(except other branches) can be used to fill this slot. When the
slot is filled, two insns execute in two cycles, reducing the
branch penalty to zero.
- The Motorola 88000 conditionally exposes its branch delay slot,
- so code is shorter when it is turned off, but will run faster
- when useful insns are scheduled there.
-
- The IBM ROMP has two forms of branch and call insns, both with and
- without a delay slot. Much like the 88k, insns not using the delay
- slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
-
The SPARC always has a branch delay slot, but its effects can be
annulled when the branch is not taken. This means that failing to
find other sources of insns, we can hoist an insn from the branch
@@ -84,8 +76,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
`fill_eager_delay_slots' tries to guess the direction the branch
will go; if it guesses right 100% of the time, it can reduce the
branch penalty as much as `fill_simple_delay_slots' does. If it
- guesses wrong 100% of the time, it might as well schedule nops (or
- on the m88k, unexpose the branch slot). When
+ guesses wrong 100% of the time, it might as well schedule nops. When
`fill_eager_delay_slots' takes insns from the fall-through path of
the jump, usually there is no code expansion; when it takes insns
from the branch target, there is code expansion if it is not the