diff options
author | Falk Hueffner <falk.hueffner@student.uni-tuebingen.de> | 2002-10-14 19:57:18 +0000 |
---|---|---|
committer | Richard Henderson <rth@gcc.gnu.org> | 2002-10-14 12:57:18 -0700 |
commit | f5204e6cb8ccfb786d254836ca4c06d3787b6c59 (patch) | |
tree | 36c7ac15f1a588536ab4e354909473741d1e9a5d | |
parent | 40e6bc7e975a1113b5e0267b5a059fb87c5e05be (diff) | |
download | gcc-f5204e6cb8ccfb786d254836ca4c06d3787b6c59.zip gcc-f5204e6cb8ccfb786d254836ca4c06d3787b6c59.tar.gz gcc-f5204e6cb8ccfb786d254836ca4c06d3787b6c59.tar.bz2 |
re PR target/7211 (Alpha prefetch hints interpreted wrong)
* config/alpha/alpha.md (extendsidi2_nofix, extendsidi2_fix):
Swap zero extension arguments.
(umaxhi3): Fix instruction class.
PR target/7211
(prefetch): Fix prefetch instructions.
PR target/7238
(pkwb): Fix output constraint.
From-SVN: r58133
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/alpha/alpha.md | 14 |
2 files changed, 17 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4267e4e..2064e1d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2002-10-14 Falk Hueffner <falk.hueffner@student.uni-tuebingen.de> + + * config/alpha/alpha.md (extendsidi2_nofix, extendsidi2_fix): + Swap zero extension arguments. + (umaxhi3): Fix instruction class. + PR target/7211 + (prefetch): Fix prefetch instructions. + PR target/7238 + (pkwb): Fix output constraint. + 2002-10-14 Alexandre Oliva <aoliva@redhat.com> * config/mips/mips.c (print_operand): Increase buffer size for diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index ed1ebf5..c878366 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -171,7 +171,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,m")))] "! TARGET_FIX" "@ - addl %1,$31,%0 + addl $31,%1,%0 ldl %0,%1 cvtlq %1,%0 lds %0,%1\;cvtlq %0,%0" @@ -184,7 +184,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:SI 1 "nonimmediate_operand" "r,m,*f,*f,m")))] "TARGET_FIX" "@ - addl %1,$31,%0 + addl $31,%1,%0 ldl %0,%1 ftois %1,%0 cvtlq %1,%0 @@ -3222,7 +3222,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (match_operand:HI 2 "reg_or_8bit_operand" "rI")))] "TARGET_MAX" "maxuw4 %r1,%2,%0" - [(set_attr "type" "shift")]) + [(set_attr "type" "mvi")]) (define_expand "smaxdi3" [(set (match_dup 3) @@ -6934,12 +6934,12 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" and leave the LRU eviction counter pointing to that block. */ static const char * const alt[2][2] = { { - "lds $f31,%a0", /* read, evict next */ + "ldq $31,%a0", /* read, evict next */ "ldl $31,%a0", /* read, evict last */ }, { "ldt $f31,%a0", /* write, evict next */ - "ldq $31,%a0", /* write, evict last */ + "lds $f31,%a0", /* write, evict last */ } }; @@ -7596,9 +7596,9 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" }) (define_insn "*pkwb" - [(set (match_operand:V8QI 0 "register_operand" "") + [(set (match_operand:V8QI 0 "register_operand" "=r") (vec_concat:V8QI - (truncate:V4QI (match_operand:V4HI 1 "register_operand" "")) + (truncate:V4QI (match_operand:V4HI 1 "register_operand" "r")) (match_operand:V4QI 2 "const0_operand" "")))] "TARGET_MAX" "pkwb %r1,%0" |