alpha.c (alpha_fold_vector_minmax): Create VIEW_CONVERT_EXPR to convert output to long_integer_type_node.

	* config/alpha/alpha.c (alpha_fold_vector_minmax): Create
	VIEW_CONVERT_EXPR to convert output to long_integer_type_node.

	(alpha_emit_conditional_branch): Do not generate direct branch
	for UNORDERED comparisons.

From-SVN: r142474

6 files changed, 40 insertions, 11 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 64f127e..22ffd3a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2008-12-05 Uros Bizjak <ubizjak@gmail.com>
+
+	* config/alpha/alpha.c (alpha_fold_vector_minmax): Create
+	VIEW_CONVERT_EXPR to convert output to long_integer_type_node.
+
+	(alpha_emit_conditional_branch): Do not generate direct branch
+	for UNORDERED comparisons.
+
 2008-12-05  Andreas Schwab  <schwab@suse.de>
 
 	* config/rs6000/linux-unwind.h (frob_update_context): Check for
@@ -50,8 +58,7 @@
 
 2008-12-04  Nick Clifton  <nickc@redhat.com>
 
-	* config/stormy16/stormy16.md: Remove extraneous spaces and
-	quotes.
+	* config/stormy16/stormy16.md: Remove extraneous spaces and quotes.
 	* config/stormy16/stormy16.c: Remove extraneous spaces and fix up
 	formatting of quotes.
 
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index d119487..26feea5 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -2453,7 +2453,7 @@ alpha_emit_conditional_branch (enum rtx_code code)
   if (alpha_compare.fp_p)
     {
       cmp_mode = DFmode;
-      if (flag_unsafe_math_optimizations)
+      if (flag_unsafe_math_optimizations && cmp_code != UNORDERED)
 	{
 	  /* When we are not as concerned about non-finite values, and we
 	     are comparing against zero, we can branch directly.  */
@@ -6825,7 +6825,7 @@ alpha_fold_vector_minmax (enum tree_code code, tree op[], tree vtype)
   tree op0 = fold_convert (vtype, op[0]);
   tree op1 = fold_convert (vtype, op[1]);
   tree val = fold_build2 (code, vtype, op0, op1);
-  return fold_convert (long_integer_type_node, val);
+  return fold_build1 (VIEW_CONVERT_EXPR, long_integer_type_node, val);
 }
 
 static tree
diff --git a/gcc/config/i386/avxintrin.h b/gcc/config/i386/avxintrin.h
index 7aea85d..6d33308 100644
--- a/gcc/config/i386/avxintrin.h
+++ b/gcc/config/i386/avxintrin.h
@@ -27,9 +27,18 @@
 /* Implemented from the specification included in the Intel C++ Compiler
    User Guide and Reference, version 11.0.  */
 
-#ifndef _IMMINTRIN_H_INCLUDED
-# error "Never use <avxintrin.h> directly; include <immintrin.h> instead."
-#endif
+#ifndef _AVXINTRIN_H_INCLUDED
+#define _AVXINTRIN_H_INCLUDED
+
+#if !defined (__AVX__)
+# error "AVX instruction set not enabled"
+#else
+
+/* We need definitions from the SSE4.1, SSSE3, SSE3, SSE2 and SSE
+   header files.  */
+#include <smmintrin.h>
+
+/* AVX */
 
 /* Internal data types for implementing the intrinsics.  */
 typedef double __v4df __attribute__ ((__vector_size__ (32)));
@@ -1469,3 +1478,7 @@ _mm256_castsi128_si256 (__m128i __A)
 {
   return (__m256i) __builtin_ia32_si256_si ((__v4si)__A);
 }
+
+#endif /* __AVX__ */
+
+#endif /* _AVXINTRIN_H_INCLUDED */
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c b/gcc/testsuite/gcc.target/i386/avx-1.c
index d093d6c..f77aec7 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -18,7 +18,7 @@
 #define __builtin_ia32_extrqi(X, I, L)  __builtin_ia32_extrqi(X, 1, 1)
 #define __builtin_ia32_insertqi(X, Y, I, L) __builtin_ia32_insertqi(X, Y, 1, 1)
 
-/* immintrin.h */
+/* avxintrin.h */
 #define __builtin_ia32_blendpd256(X, Y, M) __builtin_ia32_blendpd256(X, Y, 1)
 #define __builtin_ia32_blendps256(X, Y, M) __builtin_ia32_blendps256(X, Y, 1)
 #define __builtin_ia32_dpps256(X, Y, M) __builtin_ia32_dpps256(X, Y, 1)
@@ -133,7 +133,7 @@
 #define __builtin_ia32_protdi(A, B) __builtin_ia32_protdi(A,1)
 #define __builtin_ia32_protqi(A, B) __builtin_ia32_protqi(A,1)
 
+#include <avxintrin.h>
 #include <wmmintrin.h>
 #include <bmmintrin.h>
-#include <immintrin.h>
 #include <mm3dnow.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx-2.c b/gcc/testsuite/gcc.target/i386/avx-2.c
index 62f6538..501e81e 100644
--- a/gcc/testsuite/gcc.target/i386/avx-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx-2.c
@@ -12,9 +12,9 @@
 #define extern
 #define __inline
 
+#include <avxintrin.h>
 #include <wmmintrin.h>
 #include <bmmintrin.h>
-#include <immintrin.h>
 #include <mm3dnow.h>
 
 #define _CONCAT(x,y) x ## y
@@ -53,7 +53,7 @@
 test_1x (_mm_extracti_si64, __m128i, __m128i, 1, 1)
 test_2x (_mm_inserti_si64, __m128i, __m128i, __m128i, 1, 1)
 
-/* immintrin.h */
+/* avxintrin.h */
 test_2 (_mm256_blend_pd, __m256d, __m256d, __m256d, 1)
 test_2 (_mm256_blend_ps, __m256, __m256, __m256, 1)
 test_2 (_mm256_dp_ps, __m256, __m256, __m256, 1)
diff --git a/gcc/testsuite/gcc.target/i386/intrinsics.h b/gcc/testsuite/gcc.target/i386/intrinsics.h
new file mode 100644
index 0000000..0701fa3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/intrinsics.h
@@ -0,0 +1,9 @@
+/* Check that all x86 intrinsics can be included together.  */
+/* { dg-do compile } */
+/* { dg-options "-O -pedantic-errors -march=k8 -m3dnow -mavx -msse5 -maes -mpclmul" } */
+
+#include <immintrin.h>
+#include <bmmintrin.h>
+#include <mm3dnow.h>
+
+int dummy;