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| author | Richard Henderson <rth@cygnus.com> | 1997-09-30 22:04:30 -0700 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1997-09-30 23:04:30 -0600 |
| commit | e9d0757e5c8dd2f3a9c8645290450d5bce90c9b6 (patch) | |
| tree | 48fd31c3d9b9d973ab37586e178cfa59e5780756 | |
| parent | 3f34faec1abc7765aabb7c11eb2abc79aefa6a2b (diff) | |
| download | gcc-e9d0757e5c8dd2f3a9c8645290450d5bce90c9b6.zip gcc-e9d0757e5c8dd2f3a9c8645290450d5bce90c9b6.tar.gz gcc-e9d0757e5c8dd2f3a9c8645290450d5bce90c9b6.tar.bz2 | |
alpha.md (beq): For registers and ints 0-255...
* alpha.md (beq): For registers and ints 0-255, use cmpeq+bne, since
that pair will dual-issue on the 21164 and plus+beq won't.
(bne): Likewise for cmpeq+beq.
From-SVN: r15814
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.md | 34 |
2 files changed, 30 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c781c85..0d6a891 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Tue Sep 30 23:06:43 1997 Richard Henderson <rth@cygnus.com> + + * alpha.md (beq): For registers and ints 0-255, use cmpeq+bne, since + that pair will dual-issue on the 21164 and plus+beq won't. + (bne): Likewise for cmpeq+beq. + Tue Sep 30 16:07:58 1997 Jim Wilson <wilson@cygnus.com> * except.c (find_exception_handler_labels): Correct argument to free. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index d718481..a5f31a3 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -2478,16 +2478,23 @@ " { enum machine_mode mode; - enum rtx_code compare_code, branch_code; + enum rtx_code compare_code = EQ, branch_code = NE; if (alpha_compare_fp_p) - mode = DFmode, compare_code = EQ, branch_code = NE; + mode = DFmode; else { - mode = DImode, compare_code = MINUS, branch_code = EQ; - if (GET_CODE (alpha_compare_op1) == CONST_INT) + mode = DImode; + /* We want to use cmpeq/bne when we can, since there is a zero-delay + bypass between logicals and br/cmov on the 21164. But we don't + want to force valid immediate constants into registers needlessly. */ + if (GET_CODE (alpha_compare_op1) == CONST_INT + && ((INTVAL (alpha_compare_op1) >= -0x8000 + && INTVAL (alpha_compare_op1) < 0) + || (INTVAL (alpha_compare_op1) > 0xff + && INTVAL (alpha_compare_op1) < 0x8000))) { - compare_code = PLUS; + compare_code = PLUS, branch_code = EQ; alpha_compare_op1 = GEN_INT (- INTVAL (alpha_compare_op1)); } } @@ -2509,16 +2516,23 @@ " { enum machine_mode mode; - enum rtx_code compare_code, branch_code; + enum rtx_code compare_code = EQ, branch_code = EQ; if (alpha_compare_fp_p) - mode = DFmode, compare_code = EQ, branch_code = EQ; + mode = DFmode; else { - mode = DImode, compare_code = MINUS, branch_code = NE; - if (GET_CODE (alpha_compare_op1) == CONST_INT) + mode = DImode; + /* We want to use cmpeq/bne when we can, since there is a zero-delay + bypass between logicals and br/cmov on the 21164. But we don't + want to force valid immediate constants into registers needlessly. */ + if (GET_CODE (alpha_compare_op1) == CONST_INT + && ((INTVAL (alpha_compare_op1) >= -0x8000 + && INTVAL (alpha_compare_op1) < 0) + || (INTVAL (alpha_compare_op1) > 0xff + && INTVAL (alpha_compare_op1) < 0x8000))) { - compare_code = PLUS; + compare_code = PLUS, branch_code = NE; alpha_compare_op1 = GEN_INT (- INTVAL (alpha_compare_op1)); } } |