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| author | Jeff Law <law@redhat.com> | 2015-09-29 10:41:38 -0600 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 2015-09-29 10:41:38 -0600 |
| commit | e3ed8bb71018bc92b495c1ee3f897d1a3b7ff886 (patch) | |
| tree | 98ea7434efef260a16c107e6f9d08f7928042fb8 | |
| parent | da68b8f4d2869b6944e55dcc3c26ae1f322021c0 (diff) | |
| download | gcc-e3ed8bb71018bc92b495c1ee3f897d1a3b7ff886.zip gcc-e3ed8bb71018bc92b495c1ee3f897d1a3b7ff886.tar.gz gcc-e3ed8bb71018bc92b495c1ee3f897d1a3b7ff886.tar.bz2 | |
[PATCH] Fix undefined behaviour in SH port
* config/sh/sh.c (gen_shl_and): Fix undefined left shift
behaviour.
(gen_shl_sext): Likewise.
* config/sh/sh.md (divsi3): Likewise.
(imm->ext_dest_operand splitter): Likewise.
From-SVN: r228257
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/sh/sh.c | 4 | ||||
| -rw-r--r-- | gcc/config/sh/sh.md | 4 |
3 files changed, 12 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4993241..87de440 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-09-29 Jeff Law <law@redhat.com> + + * config/sh/sh.c (gen_shl_and): Fix undefined left shift + behaviour. + (gen_shl_sext): Likewise. + * config/sh/sh.md (divsi3): Likewise. + (imm->ext_dest_operand splitter): Likewise. + 2015-09-29 Sebastian Pop <s.pop@samsung.com> Aditya Kumar <aditya.k7@samsung.com> diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 16fb575..904201b 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -4342,7 +4342,7 @@ gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx source) that don't matter. This way, we might be able to get a shorter signed constant. */ if (mask & ((HOST_WIDE_INT) 1 << (31 - total_shift))) - mask |= (HOST_WIDE_INT) ~0 << (31 - total_shift); + mask |= (HOST_WIDE_INT) ((HOST_WIDE_INT_M1U) << (31 - total_shift)); case 2: /* Don't expand fine-grained when combining, because that will make the pattern fail. */ @@ -4626,7 +4626,7 @@ gen_shl_sext (rtx dest, rtx left_rtx, rtx size_rtx, rtx source) } emit_insn (gen_andsi3 (dest, source, GEN_INT ((1 << insize) - 1))); emit_insn (gen_xorsi3 (dest, dest, GEN_INT (1 << (insize - 1)))); - emit_insn (gen_addsi3 (dest, dest, GEN_INT (-1 << (insize - 1)))); + emit_insn (gen_addsi3 (dest, dest, GEN_INT (HOST_WIDE_INT_M1U << (insize - 1)))); operands[0] = dest; operands[2] = kind == 7 ? GEN_INT (left + 1) : left_rtx; gen_shifty_op (ASHIFT, operands); diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 8a388bc..d758e3b 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -3052,7 +3052,7 @@ tab_base = force_reg (DImode, tab_base); } if (TARGET_DIVIDE_INV20U) - i2p27 = force_reg (DImode, GEN_INT (-2 << 27)); + i2p27 = force_reg (DImode, GEN_INT ((unsigned HOST_WIDE_INT)-2 << 27)); else i2p27 = GEN_INT (0); if (TARGET_DIVIDE_INV20U || TARGET_DIVIDE_INV20L) @@ -7875,7 +7875,7 @@ label: break; } /* Try movi / mshflo.l w/ r63. */ - val2 = val + ((HOST_WIDE_INT) -1 << 32); + val2 = val + ((HOST_WIDE_INT) (HOST_WIDE_INT_M1U << 32)); if ((HOST_WIDE_INT) val2 < 0 && CONST_OK_FOR_I16 (val2)) { operands[1] = gen_mshflo_l_di (operands[0], operands[0], |