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authorKaveh R. Ghazi <ghazi@caip.rutgers.edu>1998-10-23 13:23:39 +0000
committerKaveh Ghazi <ghazi@gcc.gnu.org>1998-10-23 13:23:39 +0000
commite1ba7da73f740ffe54029e33b71f649cb299959d (patch)
tree89bd1301d3f2b5abacd84b99ed6bc88dbb99a0e1
parentdf4f7565feb1b58b9f2864825dd40bd38d3c6d40 (diff)
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Warning fixes:
* mips.h (EXTRA_SPECS): Add missing initializers. From-SVN: r23255
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/mips/mips.h24
2 files changed, 16 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a23998a..554dab1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Fri Oct 23 16:19:24 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * mips.h (EXTRA_SPECS): Add missing initializers.
+
Fri Oct 23 16:08:39 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* sparc.h (EXTRA_SPECS): Add missing initializers.
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index c562307..129624f 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -950,18 +950,18 @@ while (0)
Do not define this macro if it does not need to do anything. */
#define EXTRA_SPECS \
- { "subtarget_cc1_spec", SUBTARGET_CC1_SPEC }, \
- { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \
- { "subtarget_cpp_size_spec", SUBTARGET_CPP_SIZE_SPEC }, \
- { "long_max_spec", LONG_MAX_SPEC }, \
- { "mips_as_asm_spec", MIPS_AS_ASM_SPEC }, \
- { "gas_asm_spec", GAS_ASM_SPEC }, \
- { "target_asm_spec", TARGET_ASM_SPEC }, \
- { "subtarget_mips_as_asm_spec", SUBTARGET_MIPS_AS_ASM_SPEC }, \
- { "subtarget_asm_optimizing_spec", SUBTARGET_ASM_OPTIMIZING_SPEC }, \
- { "subtarget_asm_debugging_spec", SUBTARGET_ASM_DEBUGGING_SPEC }, \
- { "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
- { "linker_endian_spec", LINKER_ENDIAN_SPEC }, \
+ { "subtarget_cc1_spec", SUBTARGET_CC1_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_cpp_size_spec", SUBTARGET_CPP_SIZE_SPEC, 0, 0, 0, 0 }, \
+ { "long_max_spec", LONG_MAX_SPEC, 0, 0, 0, 0 }, \
+ { "mips_as_asm_spec", MIPS_AS_ASM_SPEC, 0, 0, 0, 0 }, \
+ { "gas_asm_spec", GAS_ASM_SPEC, 0, 0, 0, 0 }, \
+ { "target_asm_spec", TARGET_ASM_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_mips_as_asm_spec", SUBTARGET_MIPS_AS_ASM_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_asm_optimizing_spec", SUBTARGET_ASM_OPTIMIZING_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_asm_debugging_spec", SUBTARGET_ASM_DEBUGGING_SPEC, 0, 0, 0, 0 }, \
+ { "subtarget_asm_spec", SUBTARGET_ASM_SPEC, 0, 0, 0, 0 }, \
+ { "linker_endian_spec", LINKER_ENDIAN_SPEC, 0, 0, 0, 0 }, \
SUBTARGET_EXTRA_SPECS
#ifndef SUBTARGET_EXTRA_SPECS