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| author | Georg-Johann Lay <avr@gjlay.de> | 2011-07-29 11:27:39 +0000 |
|---|---|---|
| committer | Georg-Johann Lay <gjl@gcc.gnu.org> | 2011-07-29 11:27:39 +0000 |
| commit | db7ccee202ecc15386eb283a83f75530f7ed856a (patch) | |
| tree | 09e2abc5004aae6e8670bc26f30ae1b70f3b63b9 | |
| parent | 96d034961743d3bb13117469e1c43a404cd6facc (diff) | |
| download | gcc-db7ccee202ecc15386eb283a83f75530f7ed856a.zip gcc-db7ccee202ecc15386eb283a83f75530f7ed856a.tar.gz gcc-db7ccee202ecc15386eb283a83f75530f7ed856a.tar.bz2 | |
re PR target/49687 ([avr] Missed optimization for widening MUL)
PR target/49687
* config/avr/avr.md (mulsi3, *mulsi3, mulu<mode>si3,
muls<mode>si3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3,
*<any_extend:extend_prefix><any_extend2:extend_prefix>mul<QIHI:mode><QIHI2:mode>si3):
Add X to register footprint: Clobber r26/r27.
From-SVN: r176923
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/avr/avr.md | 9 |
2 files changed, 17 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fad87a0..d3e0ac7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-07-29 Georg-Johann Lay <avr@gjlay.de> + + PR target/49687 + * config/avr/avr.md (mulsi3, *mulsi3, mulu<mode>si3, + muls<mode>si3, mulohisi3, mulhisi3, umulhisi3, usmulhisi3, + *<any_extend:extend_prefix><any_extend2:extend_prefix>mul<QIHI:mode><QIHI2:mode>si3): + Add X to register footprint: Clobber r26/r27. + 2011-07-29 Richard Guenther <rguenther@suse.de> * builtins.c (fold_builtin_signbit): Build the comparison diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 2c215fd..55a883e 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -1373,6 +1373,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (match_operand:SI 1 "register_operand" "") (match_operand:SI 2 "nonmemory_operand" ""))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" { @@ -1395,6 +1396,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (match_operand:SI 1 "pseudo_register_operand" "r") (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1431,6 +1433,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (zero_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1466,6 +1469,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (sign_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1509,6 +1513,7 @@ (mult:SI (not:SI (zero_extend:SI (not:HI (match_operand:HI 1 "pseudo_register_operand" "r")))) (match_operand:SI 2 "pseudo_register_or_const_int_operand" "rn"))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } @@ -1528,6 +1533,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1536,6 +1542,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (zero_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1544,6 +1551,7 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "")) (sign_extend:SI (match_operand:HI 2 "register_operand" "")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))])] "AVR_HAVE_MUL" "") @@ -1557,6 +1565,7 @@ [(set (match_operand:SI 0 "pseudo_register_operand" "=r") (mult:SI (any_extend:SI (match_operand:QIHI 1 "pseudo_register_operand" "r")) (any_extend2:SI (match_operand:QIHI2 2 "pseudo_register_operand" "r")))) + (clobber (reg:HI 26)) (clobber (reg:DI 18))] "AVR_HAVE_MUL && !reload_completed" { gcc_unreachable(); } |