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author | Richard Henderson <rth@cygnus.com> | 1997-10-28 15:29:44 -0800 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 1997-10-28 15:29:44 -0800 |
commit | d540ae2cd874aeb3c4b07cdc0b25e1229eb4bf06 (patch) | |
tree | 73c9c463b8512da99cd76360abc5002a3aca5a2e | |
parent | d24661605f94cbd36b4ba817fa02a9dd94a6a2f9 (diff) | |
download | gcc-d540ae2cd874aeb3c4b07cdc0b25e1229eb4bf06.zip gcc-d540ae2cd874aeb3c4b07cdc0b25e1229eb4bf06.tar.gz gcc-d540ae2cd874aeb3c4b07cdc0b25e1229eb4bf06.tar.bz2 |
reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of DEST for the spill...
* reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of
DEST for the spill, adjust mode of SRC to compensate.
From-SVN: r16222
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/reload1.c | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f6a96bd..39a753d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Tue Oct 28 15:29:15 1997 Richard Henderson <rth@cygnus.com> + + * reload1.c (eliminate_regs [SET]): If [SUBREG] widened the mode of + DEST for the spill, adjust mode of SRC to compensate. + Tue Oct 28 14:36:45 1997 Richard Henderson <rth@cygnus.com> * alpha.md (reload_inqi): Check for MEM before strict_memory_address_p, diff --git a/gcc/reload1.c b/gcc/reload1.c index a3361ab..cbb4130 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -3271,6 +3271,12 @@ eliminate_regs (x, mem_mode, insn, storing) && GET_CODE (insn) != INSN_LIST) emit_insn_after (gen_rtx (CLOBBER, VOIDmode, SET_DEST (x)), insn); + /* If SET_DEST was a partial-word subreg, NEW0 may have been widened + to spill the entire register (see SUBREG case above). If the + widths of SET_DEST and NEW0 no longer match, adjust NEW1. */ + if (GET_MODE (SET_DEST (x)) != GET_MODE (new0)) + new1 = gen_rtx (SUBREG, GET_MODE (new0), new1, 0); + if (new0 != SET_DEST (x) || new1 != SET_SRC (x)) return gen_rtx (SET, VOIDmode, new0, new1); } |