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| author | Stan Cox <coxs@gnu.org> | 1997-03-18 22:02:36 +0000 |
|---|---|---|
| committer | Stan Cox <coxs@gnu.org> | 1997-03-18 22:02:36 +0000 |
| commit | d4e2f547d8872f5a2224fe74820a6395db157947 (patch) | |
| tree | 8ec64fbfe944487b7456c6870e20b4e379abb8a0 | |
| parent | 33c1d53aecbdcd9b36fdfda48a19d6801185b694 (diff) | |
| download | gcc-d4e2f547d8872f5a2224fe74820a6395db157947.zip gcc-d4e2f547d8872f5a2224fe74820a6395db157947.tar.gz gcc-d4e2f547d8872f5a2224fe74820a6395db157947.tar.bz2 | |
(override_options) Make the default alignment 4 for 486
From-SVN: r13739
| -rw-r--r-- | gcc/config/i386/i386.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ff48a3d..93480fc 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -279,7 +279,10 @@ override_options () fatal ("-mregparm=%d is not between 0 and %d", i386_regparm, REGPARM_MAX); } - def_align = (TARGET_386) ? 2 : 4; + /* The 486 suffers more from non-aligned cache line fills, and the larger code + size results in a larger cache foot-print and more misses. The 486 has a + 16 byte cache line, pentium and pentiumpro have a 32 byte cache line */ + def_align = (TARGET_486) ? 4 : 2; /* Validate -malign-loops= value, or provide default */ if (i386_align_loops_string) |