diff options
| author | Jim Wilson <wilson@cygnus.com> | 1998-04-14 14:56:05 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@gcc.gnu.org> | 1998-04-14 07:56:05 -0700 |
| commit | cf877a4216dc79e7c416060aed7d8dc52969a5ae (patch) | |
| tree | 984303815f5eda970dbfc96e5d2ef1b1b573d76a | |
| parent | 996d9dacc4ff00d5f8ff1cfbad6f9d4fc5005b99 (diff) | |
| download | gcc-cf877a4216dc79e7c416060aed7d8dc52969a5ae.zip gcc-cf877a4216dc79e7c416060aed7d8dc52969a5ae.tar.gz gcc-cf877a4216dc79e7c416060aed7d8dc52969a5ae.tar.bz2 | |
Fix mips64vr4100-elf build failure.
* mips.md (reload_outdi): Change the scratch mode from DImode to
TImode. New variable scratch, used instead of operand[2] in template.
Add code for MIPS16 HILO_REGNUM case where output reg is not M16_REG_P.
From-SVN: r19210
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 43 |
2 files changed, 37 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c1fa5ee..456424e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Tue Apr 14 14:55:16 1998 Jim Wilson <wilson@cygnus.com> + + * mips.md (reload_outdi): Change the scratch mode from DImode to + TImode. New variable scratch, used instead of operand[2] in template. + Add code for MIPS16 HILO_REGNUM case where output reg is not M16_REG_P. + Tue Apr 14 16:19:03 1998 Michael Meissner <meissner@cygnus.com> * expr.c (MOVE_RATIO): Set to 3 if optimizing for space. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index e6a750f..25c7239 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4639,20 +4639,25 @@ move\\t%0,%z4\\n\\ ;; Handle output reloads in DImode. +;; Reloading HILO_REG in MIPS16 mode requires two scratch registers, so we +;; use a TImode scratch reg. + (define_expand "reload_outdi" [(set (match_operand:DI 0 "general_operand" "=b") (match_operand:DI 1 "se_register_operand" "b")) - (clobber (match_operand:DI 2 "register_operand" "=&d"))] + (clobber (match_operand:TI 2 "register_operand" "=&d"))] "TARGET_64BIT" " { + rtx scratch = gen_rtx_REG (DImode, REGNO (operands[2])); + if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { - emit_insn (gen_ashrdi3 (operands[2], operands[1], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), operands[2])); - emit_insn (gen_ashldi3 (operands[2], operands[1], GEN_INT (32))); - emit_insn (gen_ashrdi3 (operands[2], operands[2], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), operands[2])); + emit_insn (gen_ashrdi3 (scratch, operands[1], GEN_INT (32))); + emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), scratch)); + emit_insn (gen_ashldi3 (scratch, operands[1], GEN_INT (32))); + emit_insn (gen_ashrdi3 (scratch, scratch, GEN_INT (32))); + emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), scratch)); DONE; } if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == HILO_REGNUM) @@ -4680,20 +4685,34 @@ move\\t%0,%z4\\n\\ emit_move_insn (scratch, gen_rtx (REG, SImode, 65)); emit_move_insn (loword, scratch); } + else if (TARGET_MIPS16 && ! M16_REG_P (REGNO (operands[0]))) + { + /* Handle the case where operand[0] is not a 'd' register, + and hence we can not directly move from the HILO register + into it. */ + rtx scratch2 = gen_rtx_REG (DImode, REGNO (operands[2]) + 1); + emit_insn (gen_movdi (scratch, gen_rtx (REG, DImode, 65))); + emit_insn (gen_ashldi3 (scratch, scratch, GEN_INT (32))); + emit_insn (gen_lshrdi3 (scratch, scratch, GEN_INT (32))); + emit_insn (gen_movdi (scratch2, gen_rtx (REG, DImode, 64))); + emit_insn (gen_ashldi3 (scratch2, scratch2, GEN_INT (32))); + emit_insn (gen_iordi3 (scratch, scratch, scratch2)); + emit_insn (gen_movdi (operands[0], scratch)); + } else { - emit_insn (gen_movdi (operands[2], gen_rtx (REG, DImode, 65))); - emit_insn (gen_ashldi3 (operands[2], operands[2], GEN_INT (32))); - emit_insn (gen_lshrdi3 (operands[2], operands[2], GEN_INT (32))); + emit_insn (gen_movdi (scratch, gen_rtx (REG, DImode, 65))); + emit_insn (gen_ashldi3 (scratch, scratch, GEN_INT (32))); + emit_insn (gen_lshrdi3 (scratch, scratch, GEN_INT (32))); emit_insn (gen_movdi (operands[0], gen_rtx (REG, DImode, 64))); emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32))); - emit_insn (gen_iordi3 (operands[0], operands[0], operands[2])); + emit_insn (gen_iordi3 (operands[0], operands[0], scratch)); } DONE; } /* This handles moves between a float register and HI/LO. */ - emit_move_insn (operands[2], operands[1]); - emit_move_insn (operands[0], operands[2]); + emit_move_insn (scratch, operands[1]); + emit_move_insn (operands[0], scratch); DONE; }") |