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| author | Monk Chiang <sh.chiang04@gmail.com> | 2013-12-19 08:32:20 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2013-12-19 08:32:20 +0000 |
| commit | cc1719e8a062e8634c86d7c79868252463907adf (patch) | |
| tree | 89a2f1c0178daa18f7c4bda9491a106e2b68cbd9 | |
| parent | 4d8ba6ec06c83f45770348e9f18fce503ed90ef6 (diff) | |
| download | gcc-cc1719e8a062e8634c86d7c79868252463907adf.zip gcc-cc1719e8a062e8634c86d7c79868252463907adf.tar.gz gcc-cc1719e8a062e8634c86d7c79868252463907adf.tar.bz2 | |
nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT settings.
2013-12-19 Monk Chiang <sh.chiang04@gmail.com>
gcc/
* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
Consider TARGET_CPU_DEFAULT settings.
From-SVN: r206106
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/common/config/nds32/nds32-common.c | 13 |
2 files changed, 16 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 660deeb..5cd1422 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-12-19 Monk Chiang <sh.chiang04@gmail.com> + + * common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): + Consider TARGET_CPU_DEFAULT settings. + 2013-12-18 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-cores.def: Add support for diff --git a/gcc/common/config/nds32/nds32-common.c b/gcc/common/config/nds32/nds32-common.c index f82f725..6a2ef81 100644 --- a/gcc/common/config/nds32/nds32-common.c +++ b/gcc/common/config/nds32/nds32-common.c @@ -86,14 +86,23 @@ static const struct default_options nds32_option_optimization_table[] = /* Run-time Target Specification. */ -/* Default enable +/* The default target flags consist of + TARGET_CPU_DEFAULT and other MASK_XXX flags. + + The value of TARGET_CPU_DEFAULT is set by + the process of 'configure' and 'make' stage. + Please check gcc/config.gcc for more implementation detail. + + Other MASK_XXX flags are set individually. + By default we enable TARGET_GP_DIRECT: Generate gp-imply instruction. TARGET_16_BIT : Generate 16/32 bit mixed length instruction. TARGET_PERF_EXT : Generate performance extention instrcution. TARGET_CMOV : Generate conditional move instruction. */ #undef TARGET_DEFAULT_TARGET_FLAGS #define TARGET_DEFAULT_TARGET_FLAGS \ - (MASK_GP_DIRECT \ + (TARGET_CPU_DEFAULT \ + | MASK_GP_DIRECT \ | MASK_16_BIT \ | MASK_PERF_EXT \ | MASK_CMOV) |