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| author | Tamar Christina <tamar.christina@arm.com> | 2017-06-07 10:06:29 +0000 |
|---|---|---|
| committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2017-06-07 10:06:29 +0000 |
| commit | cb9ac430cbadfe075164c86e9f1fe190138da15d (patch) | |
| tree | f8e452b5601df1b8cd2a0216f7fd13699821ab75 | |
| parent | e059725b244388bc318ff5fb4a4aeb4cca86abfd (diff) | |
| download | gcc-cb9ac430cbadfe075164c86e9f1fe190138da15d.zip gcc-cb9ac430cbadfe075164c86e9f1fe190138da15d.tar.gz gcc-cb9ac430cbadfe075164c86e9f1fe190138da15d.tar.bz2 | |
aarch64.c (aarch64_rtx_costs): Make sdiv more expensive than udiv.
2017-06-07 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs): Make sdiv more expensive than udiv.
Remove floating point cases from mod.
From-SVN: r248953
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 14 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c | 38 |
4 files changed, 53 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eb818fc..3b204f8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2017-06-07 Tamar Christina <tamar.christina@arm.com> + * config/aarch64/aarch64.c (aarch64_rtx_costs): Make sdiv more expensive than udiv. + Remove floating point cases from mod. + +2017-06-07 Tamar Christina <tamar.christina@arm.com> + * config/arm/aarch-cost-tables.h (cortexa53_extra_cost): Increase idiv cost. 2017-06-07 Tamar Christina <tamar.christina@arm.com> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5707e53..bce490f 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -7544,17 +7544,13 @@ cost_plus: case UMOD: if (speed) { + /* Slighly prefer UMOD over SMOD. */ if (VECTOR_MODE_P (mode)) *cost += extra_cost->vect.alu; else if (GET_MODE_CLASS (mode) == MODE_INT) *cost += (extra_cost->mult[mode == DImode].add - + extra_cost->mult[mode == DImode].idiv); - else if (mode == DFmode) - *cost += (extra_cost->fp[1].mult - + extra_cost->fp[1].div); - else if (mode == SFmode) - *cost += (extra_cost->fp[0].mult - + extra_cost->fp[0].div); + + extra_cost->mult[mode == DImode].idiv + + (code == MOD ? 1 : 0)); } return false; /* All arguments need to be in registers. */ @@ -7568,7 +7564,9 @@ cost_plus: else if (GET_MODE_CLASS (mode) == MODE_INT) /* There is no integer SQRT, so only DIV and UDIV can get here. */ - *cost += extra_cost->mult[mode == DImode].idiv; + *cost += (extra_cost->mult[mode == DImode].idiv + /* Slighly prefer UDIV over SDIV. */ + + (code == DIV ? 1 : 0)); else *cost += extra_cost->fp[mode == DFmode].div; } diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 268412e..bd6bd76 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-06-07 Tamar Christina <tamar.christina@arm.com> + + * gcc.target/aarch64/sdiv_costs_1.c: New. + 2017-06-07 Richard Biener <rguenther@suse.de> PR tree-optimization/80928 diff --git a/gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c b/gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c new file mode 100644 index 0000000..24d7f7d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sdiv_costs_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +/* Both sdiv and udiv can be used here, so prefer udiv. */ +int f1 (unsigned char *p) +{ + return 100 / p[1]; +} + +int f2 (unsigned char *p, unsigned short x) +{ + return x / p[0]; +} + +int f3 (unsigned char *p, int x) +{ + x &= 0x7fffffff; + return x / p[0]; +} + +int f5 (unsigned char *p, unsigned short x) +{ + return x % p[0]; +} + +/* This should only generate signed divisions. */ +int f4 (unsigned char *p) +{ + return -100 / p[1]; +} + +int f6 (unsigned char *p, short x) +{ + return x % p[0]; +} + +/* { dg-final { scan-assembler-times "udiv\tw\[0-9\]+, w\[0-9\]+" 4 } } */ +/* { dg-final { scan-assembler-times "sdiv\tw\[0-9\]+, w\[0-9\]+" 2 } } */ |