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| author | Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | 2019-06-03 11:09:41 +0000 |
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| committer | Prathamesh Kulkarni <prathamesh3492@gcc.gnu.org> | 2019-06-03 11:09:41 +0000 |
| commit | c89503d957f13f7f0a5eeeab1326048c455d9533 (patch) | |
| tree | 482dfe5a567cbe443be3af23ef96e3050d17af0a | |
| parent | 3fa97a0b3e233d7303aae2090c608480fead8e8a (diff) | |
| download | gcc-c89503d957f13f7f0a5eeeab1326048c455d9533.zip gcc-c89503d957f13f7f0a5eeeab1326048c455d9533.tar.gz gcc-c89503d957f13f7f0a5eeeab1326048c455d9533.tar.bz2 | |
target-supports.exp (add_options_for_aarch64_sve): New procedure.
2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* lib/target-supports.exp (add_options_for_aarch64_sve): New procedure.
(aarch64_sve_hw_bits): Call add_options_for_aarch64_sve.
(check_effective_target_aarch64_sve_hw): Likewise.
From-SVN: r271862
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 11 |
2 files changed, 15 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0621f68..999bdc2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> + + * lib/target-supports.exp (add_options_for_aarch64_sve): New procedure. + (aarch64_sve_hw_bits): Call add_options_for_aarch64_sve. + (check_effective_target_aarch64_sve_hw): Likewise. + 2019-06-03 Richard Biener <rguenther@suse.de> * gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 6aa814b..0d3d9f4 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -3883,6 +3883,13 @@ proc add_options_for_arm_neon_softfp_fp16 { flags } { return "$flags $et_arm_neon_softfp_fp16_flags" } +proc add_options_for_aarch64_sve { flags } { + if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } { + return "$flags" + } + return "$flags -march=armv8.2-a+sve" +} + # Return 1 if this is an ARM target supporting the FP16 alternative # format. Some multilibs may be incompatible with the options needed. Also # set et_arm_neon_fp16_flags to the best options to add. @@ -4360,7 +4367,7 @@ proc check_effective_target_aarch64_sve_hw { } { asm volatile ("ptrue p0.b"); return 0; } - }] + } [add_options_for_aarch64_sve ""]] } # Return true if this is an AArch64 target that can run SVE2 code. @@ -4396,7 +4403,7 @@ proc aarch64_sve_hw_bits { bits } { __builtin_abort (); return 0; } - }]] + }] [add_options_for_aarch64_sve ""]] } # Return true if this is an AArch64 target that can run SVE code and |