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author | Richard Sandiford <rdsandiford@googlemail.com> | 2012-10-31 08:01:36 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2012-10-31 08:01:36 +0000 |
commit | c727fb67fb48a1f45675a2584b7fe41c4745a929 (patch) | |
tree | 4de8b9d3b44cca7659d81143c08a7b6df2931f5c | |
parent | 7ae6664baa103b7c1e8628af77978c293549f758 (diff) | |
download | gcc-c727fb67fb48a1f45675a2584b7fe41c4745a929.zip gcc-c727fb67fb48a1f45675a2584b7fe41c4745a929.tar.gz gcc-c727fb67fb48a1f45675a2584b7fe41c4745a929.tar.bz2 |
rs6000.md (insvsi, [...]): Rename to...
gcc/
* config/rs6000/rs6000.md (insvsi, insvdi, extvsi, extvdi): Rename to...
(insvsi_internal, insvdi_internal, extvsi_internal)
(extvdi_internal): ...this.
(insv, extv): Update accordingly.
From-SVN: r193027
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 |
2 files changed, 19 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fa4d4ba..074fcac 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2012-10-31 Richard Sandiford <rdsandiford@googlemail.com> + * config/rs6000/rs6000.md (insvsi, insvdi, extvsi, extvdi): Rename to... + (insvsi_internal, insvdi_internal, extvsi_internal) + (extvdi_internal): ...this. + (insv, extv): Update accordingly. + +2012-10-31 Richard Sandiford <rdsandiford@googlemail.com> + * combine.c (simplify_comparison): If BITS_BIG_ENDIAN, always assume that zero_extracts of const_ints are doing word-sized extractions. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 2625bd7..25fed1f 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3126,13 +3126,15 @@ FAIL; if (TARGET_POWERPC64 && GET_MODE (operands[0]) == DImode) - emit_insn (gen_insvdi (operands[0], operands[1], operands[2], operands[3])); + emit_insn (gen_insvdi_internal (operands[0], operands[1], operands[2], + operands[3])); else - emit_insn (gen_insvsi (operands[0], operands[1], operands[2], operands[3])); + emit_insn (gen_insvsi_internal (operands[0], operands[1], operands[2], + operands[3])); DONE; }") -(define_insn "insvsi" +(define_insn "insvsi_internal" [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") (match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 2 "const_int_operand" "i")) @@ -3267,7 +3269,7 @@ }" [(set_attr "type" "insert_word")]) -(define_insn "insvdi" +(define_insn "insvdi_internal" [(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r") (match_operand:SI 1 "const_int_operand" "i") (match_operand:SI 2 "const_int_operand" "i")) @@ -3339,13 +3341,15 @@ FAIL; if (TARGET_POWERPC64 && GET_MODE (operands[1]) == DImode) - emit_insn (gen_extzvdi (operands[0], operands[1], operands[2], operands[3])); + emit_insn (gen_extzvdi_internal (operands[0], operands[1], operands[2], + operands[3])); else - emit_insn (gen_extzvsi (operands[0], operands[1], operands[2], operands[3])); + emit_insn (gen_extzvsi_internal (operands[0], operands[1], operands[2], + operands[3])); DONE; }") -(define_insn "extzvsi" +(define_insn "extzvsi_internal" [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extract:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i") @@ -3472,7 +3476,7 @@ (const_int 0)))] "") -(define_insn "extzvdi" +(define_insn "extzvdi_internal" [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (zero_extract:DI (match_operand:DI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i") |