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| author | Uros Bizjak <uros@gcc.gnu.org> | 2011-05-25 21:48:44 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2011-05-25 21:48:44 +0200 |
| commit | c497c412b4f86260b62e8105cf983d204a9ccc86 (patch) | |
| tree | d480ed3ddf611f8b975fe323e3cc50e04eb368c7 | |
| parent | e470affed023863f9fe24ddfeb07d20ba646d0f8 (diff) | |
| download | gcc-c497c412b4f86260b62e8105cf983d204a9ccc86.zip gcc-c497c412b4f86260b62e8105cf983d204a9ccc86.tar.gz gcc-c497c412b4f86260b62e8105cf983d204a9ccc86.tar.bz2 | |
sse.md (*<sse>_maskcmp<mode>3_comm): New pattern.
* config/i386/sse.md (*<sse>_maskcmp<mode>3_comm): New pattern.
From-SVN: r174224
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 16 |
2 files changed, 23 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1afef8e..a1da8c1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2011-05-25 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/sse.md (*<sse>_maskcmp<mode>3_comm): New pattern. + 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.md (*movqi_extv_1)): Put back @@ -6,8 +10,7 @@ 2011-05-25 H.J. Lu <hongjiu.lu@intel.com> - * doc/extend.texi (X86 Built-in Functions): Update pause - intrinsic. + * doc/extend.texi (X86 Built-in Functions): Update pause intrinsic. 2011-05-25 Bernd Schmidt <bernds@codesourcery.com> @@ -52,7 +55,7 @@ PR tree-optimization/46728 * tree-ssa-math-opts.c (gimple_expand_builtin_pow): New. (execute_cse_sincos): Add switch case for BUILT_IN_POW. - + 2011-05-25 Nathan Froyd <froydnj@codesourcery.com> * tree.h (struct tree_exp): Inherit from struct tree_typed. @@ -204,7 +207,7 @@ (go_finish): Create and delete invalid_hash. 2011-05-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com> - + PR tree-optimization/46728 * tree-ssa-math-opts.c (powi_table): New. (powi_lookup_cost): New. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2bffb09..058f82b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1184,6 +1184,22 @@ (set_attr "prefix" "vex") (set_attr "mode" "<ssescalarmode>")]) +(define_insn "*<sse>_maskcmp<mode>3_comm" + [(set (match_operand:VF 0 "register_operand" "=x,x") + (match_operator:VF 3 "sse_comparison_operator" + [(match_operand:VF 1 "register_operand" "%0,x") + (match_operand:VF 2 "nonimmediate_operand" "xm,xm")]))] + "TARGET_SSE + && GET_RTX_CLASS (GET_CODE (operands[3])) == RTX_COMM_COMPARE" + "@ + cmp%D3<ssemodesuffix>\t{%2, %0|%0, %2} + vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "isa" "noavx,avx") + (set_attr "type" "ssecmp") + (set_attr "length_immediate" "1") + (set_attr "prefix" "orig,vex") + (set_attr "mode" "<MODE>")]) + (define_insn "<sse>_maskcmp<mode>3" [(set (match_operand:VF 0 "register_operand" "=x,x") (match_operator:VF 3 "sse_comparison_operator" |