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authorPeter Bergner <bergner@gcc.gnu.org>2018-03-30 19:52:01 -0500
committerPeter Bergner <bergner@gcc.gnu.org>2018-03-30 19:52:01 -0500
commitc32170880197cf6bc9a1a08b084b3624b1cd6474 (patch)
tree680e5617fdafc80bef5a3274a4b589f1dd11fd10
parent815b2fc444a7fdc3215c522a965326efedf773c0 (diff)
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re PR testsuite/80546 (FAIL: gcc.target/powerpc/bool3-p[78].c scan-assembler-not)
PR target/80546 * config/rs6000/vsx.md (??r): New mode attribute. (*vsx_mov<mode>_64bit): Use it. (*vsx_mov<mode>_32bit): Likewise. From-SVN: r258987
-rw-r--r--gcc/ChangeLog15
-rw-r--r--gcc/config/rs6000/vsx.md17
2 files changed, 26 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b9f56ad..c444e12 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2018-03-30 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/80546
+ * config/rs6000/vsx.md (??r): New mode attribute.
+ (*vsx_mov<mode>_64bit): Use it.
+ (*vsx_mov<mode>_32bit): Likewise.
+
2018-03-30 Martin Sebor <msebor@redhat.com>
PR tree-optimization/84818
@@ -25,10 +32,10 @@
2018-03-29 Martin Liska <mliska@suse.cz>
- PR lto/84995.
- * doc/invoke.texi: Document how LTO works with debug info.
- Describe auto-load support of binutils. Mention 'x86-64'
- as valid option value of -march option.
+ PR lto/84995.
+ * doc/invoke.texi: Document how LTO works with debug info.
+ Describe auto-load support of binutils. Mention 'x86-64'
+ as valid option value of -march option.
2018-03-29 Jakub Jelinek <jakub@redhat.com>
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index a65ff75..f7f73ca 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -170,6 +170,19 @@
(TF "wp")
(KF "wq")])
+;; A mode attribute to disparage use of GPR registers, except for scalar
+;; integer modes.
+(define_mode_attr ??r [(V16QI "??r")
+ (V8HI "??r")
+ (V4SI "??r")
+ (V4SF "??r")
+ (V2DI "??r")
+ (V2DF "??r")
+ (V1TI "??r")
+ (KF "??r")
+ (TF "??r")
+ (TI "r")])
+
;; Same size integer type for floating point data
(define_mode_attr VSi [(V4SF "v4si")
(V2DF "v2di")
@@ -1200,7 +1213,7 @@
(define_insn "*vsx_mov<mode>_64bit"
[(set (match_operand:VSX_M 0 "nonimmediate_operand"
"=ZwO, <VSa>, <VSa>, r, we, ?wQ,
- ?&r, ??r, ??Y, ??r, wo, v,
+ ?&r, ??r, ??Y, <??r>, wo, v,
?<VSa>, *r, v, ??r, wZ, v")
(match_operand:VSX_M 1 "input_operand"
@@ -1229,7 +1242,7 @@
;; LVX (VMX) STVX (VMX)
(define_insn "*vsx_mov<mode>_32bit"
[(set (match_operand:VSX_M 0 "nonimmediate_operand"
- "=ZwO, <VSa>, <VSa>, ??r, ??Y, ??r,
+ "=ZwO, <VSa>, <VSa>, ??r, ??Y, <??r>,
wo, v, ?<VSa>, *r, v, ??r,
wZ, v")