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author | Kewen Lin <linkw@gcc.gnu.org> | 2019-01-17 03:03:38 +0000 |
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committer | Kewen Lin <linkw@gcc.gnu.org> | 2019-01-17 03:03:38 +0000 |
commit | b0dd8f37fa8a1c4d792513809605d8d715700f12 (patch) | |
tree | a01af89b78e2a5b1c631d43adf85e49efe0f866b | |
parent | f41bf58736b95ec17b642f4cb9c802facfc1b7bc (diff) | |
download | gcc-b0dd8f37fa8a1c4d792513809605d8d715700f12.zip gcc-b0dd8f37fa8a1c4d792513809605d8d715700f12.tar.gz gcc-b0dd8f37fa8a1c4d792513809605d8d715700f12.tar.bz2 |
[PATCH, rs6000, testsuite] Fix PR87306
PR target/87306
* gcc.dg/vect/bb-slp-pow-1.c: Modify to reflect that
the loop is not vectorized on POWER unless hardware
misaligned loads are available.
From-SVN: r268003
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/vect/bb-slp-pow-1.c | 6 |
2 files changed, 11 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d662e2a..cd20207 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-01-17 Kewen Lin <linkw@gcc.gnu.org> + + PR target/87306 + * gcc.dg/vect/bb-slp-pow-1.c: Modify to reflect that the loop is not + vectorized on POWER unless hardware misaligned loads are available. + 2019-01-16 David Malcolm <dmalcolm@redhat.com> PR target/88861 diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-pow-1.c b/gcc/testsuite/gcc.dg/vect/bb-slp-pow-1.c index 5a05bd4..cfe654e 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-pow-1.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-pow-1.c @@ -25,4 +25,8 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" } } */ +/* On older powerpc hardware (POWER7 and earlier), the default flag + -mno-allow-movmisalign prevents vectorization. On POWER8 and later, + when vect_hw_misalign is true, vectorization occurs. */ + +/* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target {{ ! powerpc*-*-* } || { powerpc*-*-* && vect_hw_misalign }} } } } */ |