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| author | Jakub Jelinek <jakub@redhat.com> | 2018-06-25 14:57:04 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2018-06-25 14:57:04 +0200 |
| commit | af62adb981dbd15d8ac49c52ffcc2028d41dd0ca (patch) | |
| tree | f4e7983a659523c2b2f5defed3f13ae7ccfdfc75 | |
| parent | aa7c78ca059c8c3d4f14f3ce445a6cc1367be02d (diff) | |
| download | gcc-af62adb981dbd15d8ac49c52ffcc2028d41dd0ca.zip gcc-af62adb981dbd15d8ac49c52ffcc2028d41dd0ca.tar.gz gcc-af62adb981dbd15d8ac49c52ffcc2028d41dd0ca.tar.bz2 | |
re PR target/84786 ([miscompilation] vunpcklpd accessing xmm16-22 targeting KNL)
PR target/84786
* config/i386/sse.md (vshift_count): New mode attr.
(<shift_insn><mode>3<mask_name>): Use <vshift_count>N instead of vN
as last operand's constraint for VI2_AVX2_AVX512BW shifts. Use YvN
instead of vN as last operand's constraint for VI48_AVX2 shifts.
* gcc.target/i386/avx512f-pr84786-3.c: New test.
From-SVN: r262015
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/avx512f-pr84786-3.c | 50 |
2 files changed, 55 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c2da642..0d3cb5f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-06-25 Jakub Jelinek <jakub@redhat.com> + + PR target/84786 + * gcc.target/i386/avx512f-pr84786-3.c: New test. + 2018-06-25 Eric Botcazou <ebotcazou@libertysurf.fr> * gnat.dg/sso9.adb: New testcase. diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr84786-3.c b/gcc/testsuite/gcc.target/i386/avx512f-pr84786-3.c new file mode 100644 index 0000000..4d125b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-pr84786-3.c @@ -0,0 +1,50 @@ +/* PR target/84786 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -mno-avx512vl -O2" } */ + +#include <x86intrin.h> + +__m512i v; +__m128i w; + +__m128i +foo (__m128i x, int y) +{ + __m128i z; +#define A(n) register __m512i zmm##n __asm ("zmm" #n); +#define B A(1) A(2) A(3) A(4) A(5) A(6) A(7) \ + A(8) A(9) A(10) A(11) A(12) A(13) A(14) + B +#undef A +#define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); + B + asm volatile ("" : "=x" (z) : "0" (w)); + x = _mm_srli_epi16 (x, y); + asm volatile ("" : : "x" (z)); +#undef A +#define A(n) asm volatile ("" : : "v" (zmm##n)); + B + return x; +} + +__m256i +bar (__m256i x, int y) +{ + __m128i z; +#undef A +#define A(n) register __m512i zmm##n __asm ("zmm" #n); + B +#undef A +#define A(n) asm volatile ("" : "=v" (zmm##n) : "0" (v)); + B + asm volatile ("" : "=x" (z) : "0" (w)); + x = _mm256_slli_epi16 (x, y); + asm volatile ("" : : "x" (z)); +#undef A +#define A(n) asm volatile ("" : : "v" (zmm##n)); + B + return x; +} + +/* { dg-final { scan-assembler-not "vpsrlw\[\^\n\r]*xmm(1\[6-9]|\[23]\[0-9])" } } */ +/* { dg-final { scan-assembler-not "vpsllw\[\^\n\r]*xmm(1\[6-9]|\[23]\[0-9])" } } */ |