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author | Uros Bizjak <ubizjak@gmail.com> | 2019-07-17 16:33:53 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2019-07-17 16:33:53 +0200 |
commit | a7dbb77712c20e1e04186d68377875a428b635f5 (patch) | |
tree | 480839795dfb840c0076f11308297036c13c54cd | |
parent | 4efd8968f8bf48265f18022b4eda5e7a99c24445 (diff) | |
download | gcc-a7dbb77712c20e1e04186d68377875a428b635f5.zip gcc-a7dbb77712c20e1e04186d68377875a428b635f5.tar.gz gcc-a7dbb77712c20e1e04186d68377875a428b635f5.tar.bz2 |
i386.md (*andqi_2_maybe_si): Handle potential partial reg stall on alternative 2.
* config/i386/i386.md (*andqi_2_maybe_si): Handle potential
partial reg stall on alternative 2.
From-SVN: r273551
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 9 |
2 files changed, 12 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f13d8a6..5c69a63 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-07-17 Uroš Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*andqi_2_maybe_si): Handle potential + partial reg stall on alternative 2. + 2019-07-17 Richard Biener <rguenther@suse.de> PR tree-optimization/91178 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index eb32d7c..47e36d4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8689,7 +8689,7 @@ (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (match_operand:QI 2 "general_operand" "qmn,qn,n")) (const_int 0))) - (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r") + (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,r") (and:QI (match_dup 1) (match_dup 2)))] "ix86_binary_operator_ok (AND, QImode, operands) && ix86_match_ccmode (insn, @@ -8705,7 +8705,12 @@ return "and{b}\t{%2, %0|%0, %2}"; } [(set_attr "type" "alu") - (set_attr "mode" "QI,QI,SI")]) + (set_attr "mode" "QI,QI,SI") + ;; Potential partial reg stall on alternative 2. + (set (attr "preferred_for_speed") + (cond [(eq_attr "alternative" "2") + (symbol_ref "!TARGET_PARTIAL_REG_STALL")] + (symbol_ref "true")))]) (define_insn "*and<mode>_2" [(set (reg FLAGS_REG) |