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author | Richard Kenner <kenner@gcc.gnu.org> | 1997-02-17 08:05:04 -0500 |
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committer | Richard Kenner <kenner@gcc.gnu.org> | 1997-02-17 08:05:04 -0500 |
commit | a7653a2c2ff4b43552e38b3635d0fdda9ed035a7 (patch) | |
tree | a6f74994dd1277b0baa03c3754f9b206ce1eb1b7 | |
parent | 4c8cc616fa702df12354cc06b39f059f9f1c56f8 (diff) | |
download | gcc-a7653a2c2ff4b43552e38b3635d0fdda9ed035a7.zip gcc-a7653a2c2ff4b43552e38b3635d0fdda9ed035a7.tar.gz gcc-a7653a2c2ff4b43552e38b3635d0fdda9ed035a7.tar.bz2 |
({,non_}short_cint_operand): Use (unsigned HOST_WIDE_INT).
(non_add_cint_operand, includes_rshift_p): Likewise.
From-SVN: r13661
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 60e499d..9491816 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on IBM RS/6000. - Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) This file is part of GNU CC. @@ -446,7 +446,7 @@ short_cint_operand (op, mode) enum machine_mode mode; { return (GET_CODE (op) == CONST_INT - && (unsigned) (INTVAL (op) + 0x8000) < 0x10000); + && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000); } /* Similar for a unsigned D field. */ @@ -467,7 +467,7 @@ non_short_cint_operand (op, mode) enum machine_mode mode; { return (GET_CODE (op) == CONST_INT - && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000); + && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); } /* Returns 1 if OP is a register that is not special (i.e., not MQ, @@ -791,7 +791,7 @@ non_add_cint_operand (op, mode) enum machine_mode mode; { return (GET_CODE (op) == CONST_INT - && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000 + && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 && (INTVAL (op) & 0xffff) != 0); } @@ -1893,7 +1893,7 @@ includes_rshift_p (shiftop, andop) register rtx shiftop; register rtx andop; { - unsigned shift_mask = ~(unsigned)0; + unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; shift_mask >>= INTVAL (shiftop); |