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| author | Carl Love <cel@us.ibm.com> | 2020-10-23 12:13:55 -0500 |
|---|---|---|
| committer | Carl Love <cel@us.ibm.com> | 2020-10-28 11:53:01 -0500 |
| commit | a3c13696fd2e18e6e2de52b25ddfe72284335732 (patch) | |
| tree | c683213f6f1530ad40062fee8d6c86efc520ad0d | |
| parent | 8572edc828f6d1e7c8243f901fe7c96f62a11a8e (diff) | |
| download | gcc-a3c13696fd2e18e6e2de52b25ddfe72284335732.zip gcc-a3c13696fd2e18e6e2de52b25ddfe72284335732.tar.gz gcc-a3c13696fd2e18e6e2de52b25ddfe72284335732.tar.bz2 | |
VSX_EXTRACT fix
2020-10-28 Carl Love <cel@us.ibm.com>
gcc/
* config/rs6000/vsx.md(xxgenpcvm_<mode>_internal): Remove TARGET_64BIT.
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d6347db..67e4f2f 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3109,7 +3109,7 @@ [(match_operand:VSX_EXTRACT_I4 1 "altivec_register_operand" "v") (match_operand:QI 2 "const_0_to_3_operand" "n")] UNSPEC_XXGENPCV))] - "TARGET_POWER10 && TARGET_64BIT" + "TARGET_POWER10" "xxgenpcv<wd>m %x0,%1,%2" [(set_attr "type" "vecsimple")]) |