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| author | Tom Wood <wood@gnu.org> | 1993-03-26 11:26:22 +0000 |
|---|---|---|
| committer | Tom Wood <wood@gnu.org> | 1993-03-26 11:26:22 +0000 |
| commit | 9f0729815d3e0dd06cc0f361749649b597360962 (patch) | |
| tree | add67cca4af8abf30808d04d1025405503febb68 | |
| parent | 8abded10788a3d5d66c8f09c94358ab1c5d4b159 (diff) | |
| download | gcc-9f0729815d3e0dd06cc0f361749649b597360962.zip gcc-9f0729815d3e0dd06cc0f361749649b597360962.tar.gz gcc-9f0729815d3e0dd06cc0f361749649b597360962.tar.bz2 | |
> (untyped_call, blockage): New patterns.
From-SVN: r3883
| -rw-r--r-- | gcc/config/arm/arm.md | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 9d91785..8601d8c 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1158,6 +1158,43 @@ return (arm_output_asm_insn (\"bl\\t%a1\", operands)); ") +;; Call subroutine returning any type. + +(define_expand "untyped_call" + [(parallel [(call (match_operand 0 "" "") + (const_int 0)) + (match_operand 1 "" "") + (match_operand 2 "" "")])] + "" + " +{ + int i; + + emit_call_insn (gen_call (operands[0], const0_rtx, NULL, const0_rtx)); + + for (i = 0; i < XVECLEN (operands[2], 0); i++) + { + rtx set = XVECEXP (operands[2], 0, i); + emit_move_insn (SET_DEST (set), SET_SRC (set)); + } + + /* The optimizer does not know that the call sets the function value + registers we stored in the result block. We avoid problems by + claiming that all hard registers are used and clobbered at this + point. */ + emit_insn (gen_blockage ()); + + DONE; +}") + +;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and +;; all of memory. This blocks insns from being moved across this point. + +(define_insn "blockage" + [(unspec_volatile [(const_int 0)] 0)] + "" + "") + (define_insn "tablejump" [(set (pc) (match_operand:SI 0 "register_operand" "r")) |