diff options
author | Richard Kenner <kenner@gcc.gnu.org> | 1993-09-01 21:57:02 -0400 |
---|---|---|
committer | Richard Kenner <kenner@gcc.gnu.org> | 1993-09-01 21:57:02 -0400 |
commit | 9d436547f74b4828480c6d8efddc8bd2afc752aa (patch) | |
tree | 56712e5bc12d923385ee70d82d9e530c89983dac | |
parent | dcac138d8ef9314f109dae212521edac22523cb6 (diff) | |
download | gcc-9d436547f74b4828480c6d8efddc8bd2afc752aa.zip gcc-9d436547f74b4828480c6d8efddc8bd2afc752aa.tar.gz gcc-9d436547f74b4828480c6d8efddc8bd2afc752aa.tar.bz2 |
Clean up case and remove leading zeros from hex constants.
From-SVN: r5248
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e8a4e0e..9bd1e54 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -70,7 +70,7 @@ "" "@ lbz%U1%X1 %0,%1 - rlinm %0,%1,0,0x000000FF" + rlinm %0,%1,0,0xff" [(set_attr "type" "load,*")]) (define_insn "" @@ -79,7 +79,7 @@ (const_int 0))) (clobber (match_scratch:SI 2 "=r"))] "" - "andil. %2,%1,0x00FF" + "andil. %2,%1,0xff" [(set_attr "type" "compare")]) (define_insn "" @@ -89,7 +89,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (match_dup 1)))] "" - "andil. %0,%1,0x00FF" + "andil. %0,%1,0xff" [(set_attr "type" "compare")]) (define_expand "zero_extendqihi2" @@ -104,7 +104,7 @@ "" "@ lbz%U1%X1 %0,%1 - rlinm %0,%1,0,0x000000FF" + rlinm %0,%1,0,0xff" [(set_attr "type" "load,*")]) (define_expand "zero_extendhisi2" @@ -119,7 +119,7 @@ "" "@ lhz%U1%X1 %0,%1 - rlinm %0,%1,0,0x0000FFFF" + rlinm %0,%1,0,0xffff" [(set_attr "type" "load,*")]) (define_insn "" @@ -128,7 +128,7 @@ (const_int 0))) (clobber (match_scratch:SI 2 "=r"))] "" - "andil. %2,%1,0xFFFF" + "andil. %2,%1,0xffff" [(set_attr "type" "compare")]) (define_insn "" @@ -138,7 +138,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (match_dup 1)))] "" - "andil. %0,%1,0xFFFF" + "andil. %0,%1,0xffff" [(set_attr "type" "compare")]) (define_expand "extendhisi2" @@ -1165,7 +1165,7 @@ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "reg_or_cint_operand" "ri")))] "" - "rl%I2nm %0,%1,%h2,0xFFFFFFFF") + "rl%I2nm %0,%1,%h2,0xffffffff") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -1174,7 +1174,7 @@ (const_int 0))) (clobber (match_scratch:SI 3 "=r"))] "" - "rl%I2nm. %3,%1,%h2,0xFFFFFFFF" + "rl%I2nm. %3,%1,%h2,0xffffffff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1185,7 +1185,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (rotate:SI (match_dup 1) (match_dup 2)))] "" - "rl%I2nm. %0,%1,%h2,0xFFFFFFFF" + "rl%I2nm. %0,%1,%h2,0xffffffff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1228,7 +1228,7 @@ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "reg_or_cint_operand" "ri")) 0)))] "" - "rl%I2nm %0,%1,%h2,0x000000FF") + "rl%I2nm %0,%1,%h2,0xff") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -1239,7 +1239,7 @@ (const_int 0))) (clobber (match_scratch:SI 3 "=r"))] "" - "rl%I2nm. %3,%1,%h2,0x000000FF" + "rl%I2nm. %3,%1,%h2,0xff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1252,7 +1252,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (subreg:QI (rotate:SI (match_dup 1) (match_dup 2)) 0)))] "" - "rl%I2nm. %0,%1,%h2,0x000000FF" + "rl%I2nm. %0,%1,%h2,0xff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1262,7 +1262,7 @@ (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "reg_or_cint_operand" "ri")) 0)))] "" - "rl%I2nm %0,%1,%h2,0x0000FFFF") + "rl%I2nm %0,%1,%h2,0xffff") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -1273,7 +1273,7 @@ (const_int 0))) (clobber (match_scratch:SI 3 "=r"))] "" - "rl%I2nm. %3,%1,%h2,0x0000FFFF" + "rl%I2nm. %3,%1,%h2,0xffff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1286,7 +1286,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (subreg:HI (rotate:SI (match_dup 1) (match_dup 2)) 0)))] "" - "rl%I2nm. %0,%1,%h2,0x0000FFFF" + "rl%I2nm. %0,%1,%h2,0xffff" [(set_attr "type" "delayed_compare")]) ;; Note that we use "sle." instead of "sl." so that we can set @@ -1442,7 +1442,7 @@ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i")) 0)))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" - "rlinm %0,%1,%s2,0x000000FF") + "rlinm %0,%1,%s2,0xff") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -1454,7 +1454,7 @@ (const_int 0))) (clobber (match_scratch:SI 3 "=r"))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" - "rlinm. %3,%1,%s2,0x000000FF" + "rlinm. %3,%1,%s2,0xff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1468,7 +1468,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (subreg:QI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 255))" - "rlinm. %0,%1,%s2,0x000000FF" + "rlinm. %0,%1,%s2,0xff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1478,7 +1478,7 @@ (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (match_operand:SI 2 "const_int_operand" "i")) 0)))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" - "rlinm %0,%1,%s2,0x0000FFFF") + "rlinm %0,%1,%s2,0xffff") (define_insn "" [(set (match_operand:CC 0 "cc_reg_operand" "=x") @@ -1490,7 +1490,7 @@ (const_int 0))) (clobber (match_scratch:SI 3 "=r"))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" - "rlinm. %3,%1,%s2,0x0000FFFF" + "rlinm. %3,%1,%s2,0xffff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -1504,7 +1504,7 @@ (set (match_operand:SI 0 "gpc_reg_operand" "=r") (zero_extend:SI (subreg:HI (lshiftrt:SI (match_dup 1) (match_dup 2)) 0)))] "includes_rshift_p (operands[2], gen_rtx (CONST_INT, VOIDmode, 65535))" - "rlinm. %0,%1,%s2,0x0000FFFF" + "rlinm. %0,%1,%s2,0xffff" [(set_attr "type" "delayed_compare")]) (define_insn "" @@ -2244,9 +2244,9 @@ "@ mcrf %0,%1 mtcrf 128,%1 - rlinm %1,%1,%F0,0xFFFFFFFF\;mtcrf %R0,%1\;rlinm %1,%1,%f0,0xFFFFFFFF + rlinm %1,%1,%F0,0xffffffff\;mtcrf %R0,%1\;rlinm %1,%1,%f0,0xffffffff mfcr %0 - mfcr %0\;rlinm %0,%0,%f1,0xF0000000 + mfcr %0\;rlinm %0,%0,%f1,0xf0000000 ai %0,%1,0 l%U1%X1 %0,%1 st%U0%U1 %1,%0" @@ -3544,7 +3544,7 @@ [(match_operand 2 "cc_reg_operand" "y") (const_int 0)]))] "" - "%D1mfcr %0\;rlinm %0,%0,%J1,0x00000001" + "%D1mfcr %0\;rlinm %0,%0,%J1,1" [(set_attr "length" "12")]) (define_insn "" @@ -3556,7 +3556,7 @@ (set (match_operand:SI 3 "gpc_reg_operand" "=r") (match_op_dup 1 [(match_dup 2) (const_int 0)]))] "" - "%D1mfcr %3\;rlinm. %3,%3,%J1,0x00000001" + "%D1mfcr %3\;rlinm. %3,%3,%J1,1" [(set_attr "type" "delayed_compare") (set_attr "length" "12")]) @@ -3661,7 +3661,7 @@ [(match_operand 5 "cc_reg_operand" "y") (const_int 0)]))] "REGNO (operands[2]) != REGNO (operands[5])" - "%D1%D4mfcr %3\;rlinm %0,%3,%J1,0x00000001\;rlinm %3,%3,%J4,0x00000001" + "%D1%D4mfcr %3\;rlinm %0,%3,%J1,1\;rlinm %3,%3,%J4,1" [(set_attr "length" "20")]) ;; There are some scc insns that can be done directly, without a compare. |