rs6000-c: The return type of the following built-in functions was implemented as int not...

gcc/ChangeLog:

2017-06-07  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c: The return type of the following
	built-in functions was implemented as int not long long.  Fix sign
	of return value for the unsigned version of vec_mulo and vec_mule.
	vector unsigned long long vec_bperm (vector unsigned long long,
	                                     vector unsigned char)
	vector signed long long vec_mule (vector signed int,
	                                  vector signed int)
	vector unsigned long long vec_mule (vector unsigned int,
	                                    vector unsigned int)
	vector signed long long vec_mulo (vector signed int,
	                                  vector signed int)
	vector unsigned long long vec_mulo (vector unsigned int,
	                                    vector unsigned int)
	* doc/extend.texi: Fix the documentation for the built-in
	functions.

gcc/testsuite/ChangeLog:

2017-06-07  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/builtins-3.c: Fix vec_mule, vec_mulo test cases.
---

From-SVN: r248998

5 files changed, 51 insertions, 25 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 706441f..f07dc97 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,23 @@
 2017-06-07  Carl Love  <cel@us.ibm.com>
 
+	* config/rs6000/rs6000-c: The return type of the following
+	built-in functions was implemented as int not long long.  Fix sign
+	of return value for the unsigned version of vec_mulo and vec_mule.
+	vector unsigned long long vec_bperm (vector unsigned long long,
+	                                     vector unsigned char)
+	vector signed long long vec_mule (vector signed int,
+	                                  vector signed int)
+	vector unsigned long long vec_mule (vector unsigned int,
+	                                    vector unsigned int)
+	vector signed long long vec_mulo (vector signed int,
+	                                  vector signed int)
+	vector unsigned long long vec_mulo (vector unsigned int,
+	                                    vector unsigned int)
+	* doc/extend.texi: Fix the documentation for the built-in
+	functions.
+
+2017-06-07  Carl Love  <cel@us.ibm.com>
+
 	PR target/80982
 	* config/rs6000/altivec.md (double<mode>2): Fix the implementation of
 	for BE.
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 230c2b4..f1e8d3d 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -2208,9 +2208,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
     RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
     RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
@@ -2227,9 +2227,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
   { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
-    RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
-  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
-    RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI,
+    RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
+  { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH,
+    RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI,
     RS6000_BTI_unsigned_V4SI, 0 },
   { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH,
     RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index d147d5a..d467a16 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -16345,10 +16345,10 @@ vector signed short vec_mule (vector signed char,
 vector unsigned int vec_mule (vector unsigned short,
                               vector unsigned short);
 vector signed int vec_mule (vector signed short, vector signed short);
-vector unsigned int vec_mule (vector unsigned int,
-                              vector unsigned int);
-vector signed int vec_mule (vector signed int,
-                            vector signed int);
+vector unsigned long long vec_mule (vector unsigned int,
+                                    vector unsigned int);
+vector signed long long vec_mule (vector signed int,
+                                  vector signed int);
 
 vector signed int vec_vmulesh (vector signed short,
                                vector signed short);
@@ -16368,7 +16368,10 @@ vector signed short vec_mulo (vector signed char, vector signed char);
 vector unsigned int vec_mulo (vector unsigned short,
                               vector unsigned short);
 vector signed int vec_mulo (vector signed short, vector signed short);
-vector unsigned int vec_mulo (vector unsigned short, vector unsigned short);
+vector unsigned long long vec_mulo (vector unsigned int,
+                                    vector unsigned int);
+vector signed long long vec_mulo (vector signed int,
+                                  vector signed int);
 
 vector signed int vec_vmulosh (vector signed short,
                                vector signed short);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e5a4dbd..e85e478 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,6 @@
+2017-06-07  Carl Love  <cel@us.ibm.com>
+	* gcc.target/powerpc/builtins-3.c: Fix vec_mule, vec_mulo test cases.
+
 2017-06-07  Jonathan Wakely  <jwakely@redhat.com>
 
 	PR c++/80990
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3.c b/gcc/testsuite/gcc.target/powerpc/builtins-3.c
index 5cbac81..b252488 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-3.c
@@ -112,26 +112,26 @@ test_vull_slo_vull_vuc (vector unsigned long long x, vector unsigned char y)
 	return vec_slo (x, y);
 }
 
-vector signed int
-test_vsi_mule_vsi_vsi (vector signed int x, vector signed int y)
+vector signed long long
+test_vsll_mule_vsi_vsi (vector signed int x, vector signed int y)
 {
 	return vec_mule (x, y);
 }
 
-vector unsigned int
-test_vui_mule_vui_vui (vector unsigned int x, vector unsigned int y)
+vector unsigned long long
+test_vull_mule_vui_vui (vector unsigned int x, vector unsigned int y)
 {
 	return vec_mule (x, y);
 }
 
-vector signed int
-test_vsi_mulo_vsi_vsi (vector signed int x, vector signed int y)
+vector signed long long
+test_vsll_mulo_vsi_vsi (vector signed int x, vector signed int y)
 {
 	return vec_mulo (x, y);
 }
 
-vector unsigned int
-test_vui_mulo_vui_vui (vector unsigned int x, vector unsigned int y)
+vector unsigned long long
+test_vull_mulo_vui_vui (vector unsigned int x, vector unsigned int y)
 {
 	return vec_mulo (x, y);
 }
@@ -207,10 +207,10 @@ test_vul_sldw_vul_vul (vector unsigned long long x,
      test_vsll_slo_vsll_vuc    1 vslo
      test_vull_slo_vsll_vsc    1 vslo
      test_vull_slo_vsll_vuc    1 vslo
-     test_vsi_mulo_vsi_vsi     1 vmulosh
-     test_vui_mulo_vui_vui     1 vmulosh
-     test_vsi_mule_vsi_vsi     1 vmulesh
-     test_vui_mule_vui_vui     1 vmulesh
+     test_vsll_mulo_vsi_vsi    1 vmulosh
+     test_vull_mulo_vui_vui    1 vmulouh
+     test_vsll_mule_vsi_vsi    1 vmulesh
+     test_vull_mule_vui_vui    1 vmuleuh
      test_vsc_mulo_vsc_vsc     1 xxsldwi
      test_vuc_mulo_vuc_vuc     1 xxsldwi
      test_vssi_mulo_vssi_vssi  1 xxsldwi
@@ -236,6 +236,8 @@ test_vul_sldw_vul_vul (vector unsigned long long x,
 /* { dg-final { scan-assembler-times "xvnegsp"  1 } } */
 /* { dg-final { scan-assembler-times "xvnegdp"  1 } } */
 /* { dg-final { scan-assembler-times "vslo"     4 } } */
-/* { dg-final { scan-assembler-times "vmulosh"  2 } } */
-/* { dg-final { scan-assembler-times "vmulesh"  2 } } */
+/* { dg-final { scan-assembler-times "vmulosh"  1 } } */
+/* { dg-final { scan-assembler-times "vmulouh"  1 } } */
+/* { dg-final { scan-assembler-times "vmulesh"  1 } } */
+/* { dg-final { scan-assembler-times "vmuleuh"  1 } } */
 /* { dg-final { scan-assembler-times "xxsldwi"  8 } } */