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author | David Edelsohn <dje@gcc.gnu.org> | 2003-04-05 12:08:00 -0500 |
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committer | David Edelsohn <dje@gcc.gnu.org> | 2003-04-05 12:08:00 -0500 |
commit | 984e25aca82757afc2b90bc6082c7890805e5fc8 (patch) | |
tree | 84220a3fc77b7c9b18fad59ea4bb2bbc6c8d4c4e | |
parent | ff95551244ee90bc9649cb3137dee18b7d909ce0 (diff) | |
download | gcc-984e25aca82757afc2b90bc6082c7890805e5fc8.zip gcc-984e25aca82757afc2b90bc6082c7890805e5fc8.tar.gz gcc-984e25aca82757afc2b90bc6082c7890805e5fc8.tar.bz2 |
[multiple changes]
2003-04-05 Andrew Pinski <apinski@apple.com>
* config/rs6000/rs6000.c (addrs_ok_for_quad_peep): Allow addr2
reg with reg1 == reg2 and offset1 = -8.
2003-04-05 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (rs6000_rtx_costs): Halve Power4
multiply costs. Correct Power4 divide costs.
* config/rs6000/power4.md: Restore multiply and FP latency.
From-SVN: r65274
-rw-r--r-- | gcc/ChangeLog | 11 | ||||
-rw-r--r-- | gcc/config/rs6000/power4.md | 14 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 17 |
3 files changed, 31 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e3c229..e54aa7d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2003-04-05 Andrew Pinski <apinski@apple.com> + + * config/rs6000/rs6000.c (addrs_ok_for_quad_peep): Allow addr2 + reg with reg1 == reg2 and offset1 = -8. + +2003-04-05 David Edelsohn <edelsohn@gnu.org> + + * config/rs6000/rs6000.c (rs6000_rtx_costs): Halve Power4 + multiply costs. Correct Power4 divide costs. + * config/rs6000/power4.md: Restore multiply and FP latency. + 2003-04-05 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz> * alias.c (find_base_term): Export. diff --git a/gcc/config/rs6000/power4.md b/gcc/config/rs6000/power4.md index 7b118a5..8ac0c15 100644 --- a/gcc/config/rs6000/power4.md +++ b/gcc/config/rs6000/power4.md @@ -104,7 +104,7 @@ "(du1_power4+du2_power4+du3_power4+du4_power4),\ iu1_power4,lsu2_power4+iu1_power4,nothing,nothing,iu2_power4") -(define_insn_reservation "power4-load-update-indexed" 4 ; 3 +(define_insn_reservation "power4-load-update-indexed" 3 (and (eq_attr "type" "load_ux") (eq_attr "cpu" "power4")) "du1_power4+du2_power4+du3_power4+du4_power4,\ @@ -197,7 +197,7 @@ (define_bypass 4 "power4-compare" "power4-branch,power4-crlogical,power4-delayedcr,power4-mfcr") -(define_insn_reservation "power4-lmul-cmp" 8 ; 7 +(define_insn_reservation "power4-lmul-cmp" 7 (and (eq_attr "type" "lmul_compare") (eq_attr "cpu" "power4")) "(du1_power4+du2_power4,iu1_power4*6,iu2_power4)\ @@ -207,7 +207,7 @@ (define_bypass 10 "power4-lmul-cmp" "power4-branch,power4-crlogical,power4-delayedcr,power4-mfcr") -(define_insn_reservation "power4-imul-cmp" 6 ; 5 +(define_insn_reservation "power4-imul-cmp" 5 (and (eq_attr "type" "imul_compare") (eq_attr "cpu" "power4")) "(du1_power4+du2_power4,iu1_power4*4,iu2_power4)\ @@ -217,7 +217,7 @@ (define_bypass 8 "power4-imul-cmp" "power4-branch,power4-crlogical,power4-delayedcr,power4-mfcr") -(define_insn_reservation "power4-lmul" 8 ; 7 +(define_insn_reservation "power4-lmul" 7 (and (eq_attr "type" "lmul") (eq_attr "cpu" "power4")) "(du1_power4,iu1_power4*6)\ @@ -227,7 +227,7 @@ ; |(du3_power4,nothing,iu2_power4*6)\ ; |(du4_power4,nothing,iu2_power4*6)") -(define_insn_reservation "power4-imul" 6 ; 5 +(define_insn_reservation "power4-imul" 5 (and (eq_attr "type" "imul") (eq_attr "cpu" "power4")) "(du1_power4,iu1_power4*4)\ @@ -237,7 +237,7 @@ ; |(du3_power4,nothing,iu2_power4*4)\ ; |(du4_power4,nothing,iu1_power4*4)") -(define_insn_reservation "power4-imul3" 5 ; 4 +(define_insn_reservation "power4-imul3" 4 (and (eq_attr "type" "imul2,imul3") (eq_attr "cpu" "power4")) "(du1_power4,iu1_power4*3)\ @@ -305,7 +305,7 @@ "du1_power4,iu1_power4") ; Basic FP latency is 6 cycles -(define_insn_reservation "power4-fp" 7 ; 6 +(define_insn_reservation "power4-fp" 6 (and (eq_attr "type" "fp,dmul") (eq_attr "cpu" "power4")) "fpq_power4") diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f5d6a7e..d62bbd3 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -7331,7 +7331,11 @@ addrs_ok_for_quad_peep (addr1, addr2) offset1 = 0; } - /* Make sure the second address is a (mem (plus (reg) (const_int))). */ +/* Make sure the second address is a (mem (plus (reg) (const_int))) + or if it is (mem (reg)) then make sure that offset1 is -8 and the same + register as addr1. */ + if (offset1 == -8 && GET_CODE (addr2) == REG && reg1 == REGNO (addr2)) + return 1; if (GET_CODE (addr2) != PLUS) return 0; @@ -13744,8 +13748,8 @@ rs6000_rtx_costs (x, code, outer_code, total) case PROCESSOR_POWER4: *total = (GET_CODE (XEXP (x, 1)) != CONST_INT ? GET_MODE (XEXP (x, 1)) != DImode - ? COSTS_N_INSNS (5) : COSTS_N_INSNS (7) - : COSTS_N_INSNS (4)); + ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4) + : COSTS_N_INSNS (2)); return true; default: @@ -13807,7 +13811,6 @@ rs6000_rtx_costs (x, code, outer_code, total) case PROCESSOR_PPC620: case PROCESSOR_PPC630: - case PROCESSOR_POWER4: *total = (GET_MODE (XEXP (x, 1)) != DImode ? COSTS_N_INSNS (21) : COSTS_N_INSNS (37)); @@ -13823,6 +13826,12 @@ rs6000_rtx_costs (x, code, outer_code, total) *total = COSTS_N_INSNS (23); return true; + case PROCESSOR_POWER4: + *total = (GET_MODE (XEXP (x, 1)) != DImode + ? COSTS_N_INSNS (18) + : COSTS_N_INSNS (34)); + return true; + default: abort (); } |