diff options
author | David Edelsohn <edelsohn@mhpcc.edu> | 1999-01-19 11:52:49 +0000 |
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committer | David Edelsohn <dje@gcc.gnu.org> | 1999-01-19 06:52:49 -0500 |
commit | 97f6e72f229d19e8871a53fd9f553d1a2ccd8e9f (patch) | |
tree | 0c2d32cd593b3fe881878e508c8d4b0592d428d3 | |
parent | e2213efb9d5fcf1db3fe35d08a827c82fccbd6a7 (diff) | |
download | gcc-97f6e72f229d19e8871a53fd9f553d1a2ccd8e9f.zip gcc-97f6e72f229d19e8871a53fd9f553d1a2ccd8e9f.tar.gz gcc-97f6e72f229d19e8871a53fd9f553d1a2ccd8e9f.tar.bz2 |
rs6000.c (offsettable_addr_operand): Delete.
* rs6000.c (offsettable_addr_operand): Delete.
(offsettable_mem_operand): New function.
* rs6000.h (PREDICATE_CODES): Reflect function change.
(RS6000_SAVE_TOC): Represent address as MEM.
* win-nt.h (RS6000_SAVE_TOC): Same.
* rs6000.md (indirect calls): Change offsettable address parameter
to offsettable memory parameter.
From-SVN: r24762
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 9 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 8 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 20 | ||||
-rw-r--r-- | gcc/config/rs6000/win-nt.h | 6 |
5 files changed, 34 insertions, 19 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d526323..a8f8ecb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +Tue Jan 19 14:51:36 1999 David Edelsohn <edelsohn@mhpcc.edu> + + * rs6000.c (offsettable_addr_operand): Delete. + (offsettable_mem_operand): New function. + * rs6000.h (PREDICATE_CODES): Reflect function change. + (RS6000_SAVE_TOC): Represent address as MEM. + * win-nt.h (RS6000_SAVE_TOC): Same. + * rs6000.md (indirect calls): Change offsettable address parameter + to offsettable memory parameter. + Tue Jan 19 10:24:53 1999 Mark Mitchell <mark@markmitchell.com> * rtl.h (rtx_def): Update documentation. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 806bbad..2b95156 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -832,15 +832,16 @@ volatile_mem_operand (op, mode) return memory_address_p (mode, XEXP (op, 0)); } -/* Return 1 if the operand is an offsettable memory address. */ +/* Return 1 if the operand is an offsettable memory operand. */ int -offsettable_addr_operand (op, mode) +offsettable_mem_operand (op, mode) register rtx op; enum machine_mode mode; { - return offsettable_address_p (reload_completed | reload_in_progress, - mode, op); + return ((GET_CODE (op) == MEM) + && offsettable_address_p (reload_completed | reload_in_progress, + mode, XEXP (op, 0))); } /* Return 1 if the operand is either an easy FP constant (see above) or diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index e6810f1..10e6687 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1249,8 +1249,10 @@ typedef struct rs6000_stack { /* Size of the fixed area on the stack */ #define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48) -/* Address to save the TOC register */ -#define RS6000_SAVE_TOC plus_constant (stack_pointer_rtx, (TARGET_32BIT ? 20 : 40)) +/* MEM representing address to save the TOC register */ +#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ + plus_constant (stack_pointer_rtx, \ + (TARGET_32BIT ? 20 : 40))) /* Offset & size for fpmem stack locations used for converting between float and integral types. */ @@ -3204,7 +3206,7 @@ do { \ {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \ {"lwa_operand", {SUBREG, MEM, REG}}, \ {"volatile_mem_operand", {MEM}}, \ - {"offsettable_addr_operand", {REG, SUBREG, PLUS}}, \ + {"offsettable_mem_operand", {MEM}}, \ {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \ {"add_operand", {SUBREG, REG, CONST_INT}}, \ {"non_add_cint_operand", {CONST_INT}}, \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 200228a..47dcc11 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7356,14 +7356,14 @@ [(call (mem:SI (match_operand:SI 0 "register_operand" "b")) (match_operand 1 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n")) - (use (match_operand 3 "offsettable_addr_operand" "p")) + (use (match_operand 3 "offsettable_mem_operand" "o")) (use (match_operand 4 "register_operand" "r")) (clobber (match_operand 5 "register_operand" "=r")) (clobber (match_scratch:SI 6 "=&r")) (clobber (match_scratch:SI 7 "=l"))] "DEFAULT_ABI == ABI_AIX && (INTVAL (operands[2]) == CALL_NORMAL || (INTVAL (operands[2]) & CALL_LONG) != 0)" - "{st|stw} %4,%a3\;{l|lwz} %6,0(%0)\;{l|lwz} %4,4(%0)\;mt%7 %6\;{l|lwz} %5,8(%0)\;{brl|blrl}\;{l|lwz} %4,%a3" + "{st|stw} %4,%3\;{l|lwz} %6,0(%0)\;{l|lwz} %4,4(%0)\;mt%7 %6\;{l|lwz} %5,8(%0)\;{brl|blrl}\;{l|lwz} %4,%3" [(set_attr "type" "load") (set_attr "length" "28")]) @@ -7371,14 +7371,14 @@ [(call (mem:SI (match_operand:DI 0 "register_operand" "b")) (match_operand 1 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n")) - (use (match_operand 3 "offsettable_addr_operand" "p")) + (use (match_operand 3 "offsettable_mem_operand" "o")) (use (match_operand 4 "register_operand" "r")) (clobber (match_operand 5 "register_operand" "=r")) (clobber (match_scratch:SI 6 "=&r")) (clobber (match_scratch:SI 7 "=l"))] "TARGET_64BIT && DEFAULT_ABI == ABI_AIX && (INTVAL (operands[2]) == CALL_NORMAL || (INTVAL (operands[2]) & CALL_LONG) != 0)" - "std %4,%a3\;ld %6,0(%0)\;ld %4,8(%0)\;mt%7 %6\;ld %5,16(%0)\;blrl\;ld %4,%a3" + "std %4,%3\;ld %6,0(%0)\;ld %4,8(%0)\;mt%7 %6\;ld %5,16(%0)\;blrl\;ld %4,%3" [(set_attr "type" "load") (set_attr "length" "28")]) @@ -7387,14 +7387,14 @@ (call (mem:SI (match_operand:SI 1 "register_operand" "b")) (match_operand 2 "const_int_operand" "n"))) (use (match_operand 3 "const_int_operand" "n")) - (use (match_operand 4 "offsettable_addr_operand" "p")) + (use (match_operand 4 "offsettable_mem_operand" "o")) (use (match_operand 5 "register_operand" "r")) (clobber (match_operand 6 "register_operand" "=r")) (clobber (match_scratch:SI 7 "=&r")) (clobber (match_scratch:SI 8 "=l"))] "DEFAULT_ABI == ABI_AIX && (INTVAL (operands[3]) == CALL_NORMAL || (INTVAL (operands[3]) & CALL_LONG) != 0)" - "{st|stw} %5,%a4\;{l|lwz} %7,0(%1)\;{l|lwz} %5,4(%1)\;mt%8 %7\;{l|lwz} %6,8(%1)\;{brl|blrl}\;{l|lwz} %5,%a4" + "{st|stw} %5,%4\;{l|lwz} %7,0(%1)\;{l|lwz} %5,4(%1)\;mt%8 %7\;{l|lwz} %6,8(%1)\;{brl|blrl}\;{l|lwz} %5,%4" [(set_attr "type" "load") (set_attr "length" "28")]) @@ -7403,14 +7403,14 @@ (call (mem:SI (match_operand:DI 1 "register_operand" "b")) (match_operand 2 "const_int_operand" "n"))) (use (match_operand 3 "const_int_operand" "n")) - (use (match_operand 4 "offsettable_addr_operand" "p")) + (use (match_operand 4 "offsettable_mem_operand" "o")) (use (match_operand 5 "register_operand" "r")) (clobber (match_operand 6 "register_operand" "=r")) (clobber (match_scratch:SI 7 "=&r")) (clobber (match_scratch:SI 8 "=l"))] "TARGET_64BIT && DEFAULT_ABI == ABI_AIX && (INTVAL (operands[3]) == CALL_NORMAL || (INTVAL (operands[3]) & CALL_LONG) != 0)" - "std %5,%a4\;ld %7,0(%1)\;ld %5,8(%1)\;mt%8 %7\;ld %6,16(%1)\;blrl\;ld %5,%a4" + "std %5,%4\;ld %7,0(%1)\;ld %5,8(%1)\;mt%8 %7\;ld %6,16(%1)\;blrl\;ld %5,%4" [(set_attr "type" "load") (set_attr "length" "28")]) @@ -7432,7 +7432,7 @@ [(call (mem:SI (match_operand:SI 0 "register_operand" "b")) (match_operand 1 "const_int_operand" "n")) (use (match_operand 2 "const_int_operand" "n")) - (use (match_operand 3 "offsettable_addr_operand" "p")) + (use (match_operand 3 "offsettable_mem_operand" "o")) (use (match_operand 4 "register_operand" "r")) (clobber (match_scratch:SI 5 "=&r")) (clobber (match_scratch:SI 6 "=l"))] @@ -7447,7 +7447,7 @@ (call (mem:SI (match_operand:SI 1 "register_operand" "b")) (match_operand 2 "const_int_operand" "n"))) (use (match_operand 3 "const_int_operand" "n")) - (use (match_operand 4 "offsettable_addr_operand" "p")) + (use (match_operand 4 "offsettable_mem_operand" "o")) (use (match_operand 5 "register_operand" "r")) (clobber (match_scratch:SI 6 "=&r")) (clobber (match_scratch:SI 7 "=l"))] diff --git a/gcc/config/rs6000/win-nt.h b/gcc/config/rs6000/win-nt.h index 742a5e8..796e487 100644 --- a/gcc/config/rs6000/win-nt.h +++ b/gcc/config/rs6000/win-nt.h @@ -119,9 +119,11 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC) -/* Address to save the TOC register */ +/* MEM representing address to save the TOC register */ #undef RS6000_SAVE_TOC -#define RS6000_SAVE_TOC plus_constant (virtual_incoming_args_rtx, -RS6000_SAVE_AREA - 8) +#define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \ + plus_constant (virtual_incoming_args_rtx, + -RS6000_SAVE_AREA - 8)) /* Windows NT specifies that r13 is reserved to the OS, so it is not available to the normal user. */ |