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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2015-01-08 04:46:41 +0100 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2015-01-08 04:46:41 +0100 |
| commit | 946695b779e0ca8c6cb9eabe109465b6c0b599a8 (patch) | |
| tree | 1f11f2cef67aad8acb4678fa6c6eb4f5aef2cd50 | |
| parent | 317991c964f76a730226577a85f576a3b7935c20 (diff) | |
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re PR target/36557 (-m32 -mpowerpc64 produces better code than -m64 for a!=0)
PR target/36557
* config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New.
From-SVN: r219336
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 60 |
2 files changed, 65 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 137b640..5eb1bc6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-01-07 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/36557 + * config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New. + 2015-01-07 Sandra Loosemore <sandra@codesourcery.com> * doc/invoke.texi ([-fvtable-verify]): Fix markup on option diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8e9ac3b..a451af5 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -12576,6 +12576,66 @@ (if_then_else (match_test "operands[2] == const0_rtx") (const_string "8") (const_string "12")))]) + +(define_insn_and_split "*eqsi3_ext<mode>" + [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") + (eq:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r") + (match_operand:SI 2 "scc_eq_operand" "rKLI"))) + (clobber (match_scratch:SI 3 "=r")) + (clobber (match_scratch:SI 4 "=r"))] + "" + "#" + "" + [(set (match_dup 4) + (clz:SI (match_dup 3))) + (set (match_dup 0) + (zero_extend:EXTSI + (lshiftrt:SI (match_dup 4) + (const_int 5))))] +{ + operands[3] = rs6000_emit_eqne (SImode, + operands[1], operands[2], operands[3]); + + if (GET_CODE (operands[4]) == SCRATCH) + operands[4] = gen_reg_rtx (SImode); +} + [(set (attr "length") + (if_then_else (match_test "operands[2] == const0_rtx") + (const_string "8") + (const_string "12")))]) + +(define_insn_and_split "*nesi3_ext<mode>" + [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") + (ne:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r") + (match_operand:SI 2 "scc_eq_operand" "rKLI"))) + (clobber (match_scratch:SI 3 "=r")) + (clobber (match_scratch:SI 4 "=r")) + (clobber (match_scratch:EXTSI 5 "=r"))] + "" + "#" + "" + [(set (match_dup 4) + (clz:SI (match_dup 3))) + (set (match_dup 5) + (zero_extend:EXTSI + (lshiftrt:SI (match_dup 4) + (const_int 5)))) + (set (match_dup 0) + (xor:EXTSI (match_dup 5) + (const_int 1)))] +{ + operands[3] = rs6000_emit_eqne (SImode, + operands[1], operands[2], operands[3]); + + if (GET_CODE (operands[4]) == SCRATCH) + operands[4] = gen_reg_rtx (SImode); + if (GET_CODE (operands[5]) == SCRATCH) + operands[5] = gen_reg_rtx (<MODE>mode); +} + [(set (attr "length") + (if_then_else (match_test "operands[2] == const0_rtx") + (const_string "12") + (const_string "16")))]) ;; Define both directions of branch and return. If we need a reload ;; register, we'd rather use CR0 since it is much easier to copy a |