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authorChen Liqin <liqin@sunnorth.com.cn>2006-10-19 09:19:21 +0000
committerChen Liqin <liqin@gcc.gnu.org>2006-10-19 09:19:21 +0000
commit93ef7c1f7e34843c5480d363ccea716ddd6ae496 (patch)
tree1f5222a4bf4f8528e42b4517c96a79a2554af9a5
parentafc0a4ba176a14e0c1f20bb07b4b558ccd76b99d (diff)
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invoke.texi (Score Options): New section.
* doc/invoke.texi (Score Options): New section. * doc/md.texi (Score family): New section to document constraints. * config/score/t-score-elf: Fix spelling typo. * config/score/score.c: Add TARGET_DEFAULT_TARGET_FLAGS macro. * config/score/score.h: Fix spelling typo. * config/score/score-mdaux.c: Remove TARGET_NOPINDEX condition. * config/score/score.opt: Remove -mnpi -mnuls -mSCORE5/5U -mSCORE7 options. From-SVN: r117882
-rw-r--r--ChangeLog4
-rw-r--r--MAINTAINERS1
-rw-r--r--gcc/ChangeLog25
-rw-r--r--gcc/config/score/score-mdaux.c2
-rw-r--r--gcc/config/score/score.c3
-rw-r--r--gcc/config/score/score.h14
-rw-r--r--gcc/config/score/score.opt16
-rw-r--r--gcc/config/score/t-score-elf2
-rw-r--r--gcc/doc/invoke.texi34
-rw-r--r--gcc/doc/md.texi81
10 files changed, 155 insertions, 27 deletions
diff --git a/ChangeLog b/ChangeLog
index 3916fc6..5f8543d 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -7,10 +7,6 @@
* config.guess: Import latest version.
* config.sub: Likewise.
-2006-10-16 Tan Shengguo <shengguo@sunnorth.com.cn>
-
- * MAINTAINERS: Add Tan Shengguo as score port maintainer.
-
2006-10-10 Brooks Moses <bmoses@stanford.edu>
* Makefile.def: Added pdf target handling.
diff --git a/MAINTAINERS b/MAINTAINERS
index 61aeb6e..0e7c1c5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -75,6 +75,7 @@ rs6000 port David Edelsohn dje@watson.ibm.com
rs6000 vector extns Aldy Hernandez aldyh@redhat.com
s390 port Hartmut Penner hpenner@de.ibm.com
s390 port Ulrich Weigand uweigand@de.ibm.com
+score port Chen Liqin liqin@sunnorth.com.cn
sh port Joern Rennecke joern.rennecke@st.com
sh port Alexandre Oliva aoliva@redhat.com
sh libraries/configury Kaz Kojima kkojima@gcc.gnu.org
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9de713a..aeb32ea 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,28 @@
+2006-10-19 Chen Liqin <liqin@sunnorth.com.cn>
+
+ * config/score/crti.asm: New file.
+ * config/score/crtn.asm: New file.
+ * config/score/elf.h: New file.
+ * config/score/mac.md: New file.
+ * config/score/misc.md: New file.
+ * config/score/mul-div.S: New file.
+ * config/score/predicates.md: New file.
+ * config/score/score7.md: New file.
+ * config/score/score.c: New file.
+ * config/score/score-conv.h: New file.
+ * config/score/score.h: New file.
+ * config/score/score.md: New file.
+ * config/score/score-mdaux.c: New file.
+ * config/score/score-mdaux.h: New file.
+ * config/score/score-modes.def: New file.
+ * config/score/score.opt: New file.
+ * config/score/score-protos.h: New file.
+ * config/score/score-version.h: New file.
+ * config/score/t-score-elf: New file.
+ * config.gcc: Add score*-*-* configurations(Update before).
+ * doc/invoke.texi (Score Options): New section.
+ * doc/md.texi (Score family): New section to document constraints.
+
2006-10-19 Nick Clifton <nickc@redhat.com>
* config/arm/arm.c: Fix spelling typo.
diff --git a/gcc/config/score/score-mdaux.c b/gcc/config/score/score-mdaux.c
index 6f72fb6..09db134 100644
--- a/gcc/config/score/score-mdaux.c
+++ b/gcc/config/score/score-mdaux.c
@@ -397,7 +397,7 @@ mda_classify_address (struct score_address_info *info,
case POST_DEC:
case PRE_INC:
case POST_INC:
- if (TARGET_NOPINDEX || GET_MODE_SIZE (mode) > GET_MODE_SIZE (SImode))
+ if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (SImode))
return false;
info->type = ADD_REG;
info->reg = XEXP (x, 0);
diff --git a/gcc/config/score/score.c b/gcc/config/score/score.c
index 323d40d..7100103 100644
--- a/gcc/config/score/score.c
+++ b/gcc/config/score/score.c
@@ -126,6 +126,9 @@ static bool score_rtx_costs (rtx, int, int, int *);
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS score_rtx_costs
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
+
/* Implement TARGET_RETURN_IN_MEMORY. In S+core,
small structures are returned in a register.
Objects with varying size must still be returned in memory. */
diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h
index 3429018..2726a04 100644
--- a/gcc/config/score/score.h
+++ b/gcc/config/score/score.h
@@ -37,7 +37,7 @@ extern GTY(()) rtx cmp_op1;
#undef ASM_SPEC
#define ASM_SPEC \
- "%{!mel:-EB} %{mel:-EL} %{mSCORE5U:-SCORE5U} %{mSCORE7:-SCORE7} %{G*}"
+ "%{!mel:-EB} %{mel:-EL} %{mscore5u:-SCORE5U} %{mscore7:-SCORE7} %{G*}"
#undef LINK_SPEC
#define LINK_SPEC "%{!mel:-EB} %{mel:-EL} %{G*}"
@@ -207,10 +207,10 @@ extern GTY(()) rtx cmp_op1;
but Control register have 32 registers, cr16-cr31. */
#define FIXED_REGISTERS \
{ \
- /* General Purpose Registers */ \
+ /* General Purpose Registers */ \
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
- /* Control Registers */ \
+ /* Control Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
@@ -220,17 +220,17 @@ extern GTY(()) rtx cmp_op1;
/* CP 2 Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- /* CP 3 Registers*/ \
+ /* CP 3 Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
}
#define CALL_USED_REGISTERS \
{ \
- /* General purpose register */ \
+ /* General purpose register */ \
1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- /* Control Registers */ \
+ /* Control Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* CP 1 Registers */ \
@@ -356,7 +356,7 @@ enum reg_class
{ 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \
{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \
- /* ALL_REGS */ \
+ /* ALL_REGS */ \
{ 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \
}
diff --git a/gcc/config/score/score.opt b/gcc/config/score/score.opt
index 2b9f03e..38992d1 100644
--- a/gcc/config/score/score.opt
+++ b/gcc/config/score/score.opt
@@ -27,27 +27,15 @@ mel
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Generate little-endian code
-mnpi
-Target RejectNegative Report Mask(NOPINDEX)
-Do not use pre/post index
-
-mnuls
-Target RejectNegative Report Mask(NOUNALIGNED)
-Do not use unaligned load/store
-
mmac
Target RejectNegative Report Mask(MAC)
Enable mac instruction
-mSCORE5
-Target RejectNegative Report Mask(SCORE5)
-Support SCORE 5 ISA
-
-mSCORE5U
+mscore5u
Target RejectNegative Report Mask(SCORE5U)
Support SCORE 5U ISA
-mSCORE7
+mscore7
Target RejectNegative Report Mask(SCORE7)
Support SCORE 7 ISA
diff --git a/gcc/config/score/t-score-elf b/gcc/config/score/t-score-elf
index 2590b67..535c4c6 100644
--- a/gcc/config/score/t-score-elf
+++ b/gcc/config/score/t-score-elf
@@ -35,7 +35,7 @@ dp-bit.c: $(srcdir)/config/fp-bit.c
# without the $gp register.
TARGET_LIBGCC2_CFLAGS = -G 0
-MULTILIB_OPTIONS = fPIC mel mSCORE7
+MULTILIB_OPTIONS = fPIC mel mscore7
MULTILIB_MATCHES = fPIC=fpic
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index b7aaabe..15666ca 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -694,6 +694,11 @@ See RS/6000 and PowerPC Options.
-mtpf-trace -mno-tpf-trace -mfused-madd -mno-fused-madd @gol
-mwarn-framesize -mwarn-dynamicstack -mstack-size -mstack-guard}
+@emph{Score Options}
+@gccoptlist{-mel -mel @gol
+-mmac @gol
+-mscore5u -mscore7}
+
@emph{SH Options}
@gccoptlist{-m1 -m2 -m2e -m3 -m3e @gol
-m4-nofpu -m4-single-only -m4-single -m4 @gol
@@ -7319,6 +7324,7 @@ platform.
* PowerPC Options::
* RS/6000 and PowerPC Options::
* S/390 and zSeries Options::
+* Score Options::
* SH Options::
* SPARC Options::
* System V Options::
@@ -12162,6 +12168,34 @@ In order to be efficient the extra code makes the assumption that the stack star
at an address aligned to the value given by @var{stack-size}.
@end table
+@node Score Options
+@subsection Score Options
+@cindex Score Options
+
+These options are defined for Score implementations:
+
+@table @gcctabopt
+@item -mel
+@opindex -mel
+Compile code for little endian mode.
+
+@item -meb
+@opindex meb
+Compile code for big endian mode. This is the default.
+
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+
+@item -mscore5u
+@opindex mscore5u
+Specify the SCORE5U of the target architecture.
+
+@item -mscore7
+@opindex mscore7
+Specify the SCORE7 of the target architecture. This is the default.
+@end table
+
@node SH Options
@subsection SH Options
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 1fd7262..3b30e36 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -2766,6 +2766,87 @@ Shift count operand.
@end table
+@item Score family---@file{config/score/score.h}
+@table @code
+@item d
+Registers from r0 to r32.
+
+@item e
+Registers from r0 to r16.
+
+@item t
+r8---r11 or r22---r27 registers.
+
+@item h
+hi register.
+
+@item l
+lo register.
+
+@item x
+hi + lo register.
+
+@item q
+cnt register.
+
+@item y
+lcb register.
+
+@item z
+scb register.
+
+@item a
+cnt + lcb + scb register.
+
+@item c
+cr0---cr15 register.
+
+@item b
+cp1 registers.
+
+@item f
+cp2 registers.
+
+@item i
+cp3 registers.
+
+@item j
+cp1 + cp2 + cp3 registers.
+
+@item I
+Unsigned 15 bit integer (in the range 0 to 32767).
+
+@item J
+Unsigned 5 bit integer (in the range 0 to 31).
+
+@item K
+Unsigned 16 bit integer (in the range 0 to 65535).
+
+@item L
+Signed 16 bit integer (in the range @minus{}32768 to 32767).
+
+@item M
+Unsigned 14 bit integer (in the range 0 to 16383).
+
+@item N
+Signed 14 bit integer (in the range @minus{}8192 to 8191).
+
+@item O
+Signed 15 bit integer (in the range @minus{}16384 to 16383).
+
+@item P
+Signed 12 bit integer (in the range @minus{}2048 to 2047).
+
+@item J
+An integer constant with exactly a single bit set.
+
+@item Q
+An integer constant.
+
+@item Z
+Any SYMBOL_REF.
+@end table
+
@item Xstormy16---@file{config/stormy16/stormy16.h}
@table @code
@item a