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| author | Jakub Jelinek <jakub@redhat.com> | 2012-01-28 01:29:11 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2012-01-28 01:29:11 +0100 |
| commit | 8ea2d689b82ee9cf94004e802e01ecb160ad65d8 (patch) | |
| tree | daa46b5d9b30c0dcf4958e2a458d9e0b7d5c18b2 | |
| parent | 44d111797f0e905e994a552a549e54da26c7941f (diff) | |
| download | gcc-8ea2d689b82ee9cf94004e802e01ecb160ad65d8.zip gcc-8ea2d689b82ee9cf94004e802e01ecb160ad65d8.tar.gz gcc-8ea2d689b82ee9cf94004e802e01ecb160ad65d8.tar.bz2 | |
re PR target/52006 (ARM ICE with incorrectly peepholed tls_load_dot_plus_eight)
PR target/52006
* config/arm/arm.md (pic_add_dot_plus_eight peephole2): Use
arm_general_register_operand predicate for operand 2 instead of
register_operand.
* gcc.target/arm/pr52006.c: New test.
From-SVN: r183661
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr52006.c | 19 |
4 files changed, 34 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b9e7791..5376d31 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-01-28 Jakub Jelinek <jakub@redhat.com> + + PR target/52006 + * config/arm/arm.md (pic_add_dot_plus_eight peephole2): Use + arm_general_register_operand predicate for operand 2 instead of + register_operand. + 2012-01-27 Ian Lance Taylor <iant@google.com> PR go/47656 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 97a83a4..b21d0d2 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1,6 +1,6 @@ ;;- Machine description for ARM for GNU compiler ;; Copyright 1991, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999, 2000, -;; 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 +;; 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ;; Free Software Foundation, Inc. ;; Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl) ;; and Martin Simmons (@harleqn.co.uk). @@ -5719,7 +5719,8 @@ (const_int 8) (match_operand 1 "" "")] UNSPEC_PIC_BASE)) - (set (match_operand:SI 2 "register_operand" "") (mem:SI (match_dup 0)))] + (set (match_operand:SI 2 "arm_general_register_operand" "") + (mem:SI (match_dup 0)))] "TARGET_ARM && peep2_reg_dead_p (2, operands[0])" [(set (match_dup 2) (mem:SI (unspec:SI [(match_dup 3) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b3cb233..7d0285b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-01-28 Jakub Jelinek <jakub@redhat.com> + + PR target/52006 + * gcc.target/arm/pr52006.c: New test. + 2012-01-27 Aldy Hernandez <aldyh@redhat.com> PR testsuite/52011 diff --git a/gcc/testsuite/gcc.target/arm/pr52006.c b/gcc/testsuite/gcc.target/arm/pr52006.c new file mode 100644 index 0000000..249470a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr52006.c @@ -0,0 +1,19 @@ +/* PR target/52006 */ +/* { dg-do compile } */ +/* { dg-options "-march=armv7-a -mfloat-abi=hard -O2 -fPIC" } */ + +unsigned long a; +static int b; + +void +foo (void) +{ + asm volatile ("" : "=r" (b)); +} + +void +bar (float f) +{ + if (f < b / 100.0) + a = 1; +} |