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| author | Jakub Jelinek <jakub@redhat.com> | 2017-08-01 18:12:31 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2017-08-01 18:12:31 +0200 |
| commit | 8e1863eca8c8914cc5e05369dacdc5266cdca179 (patch) | |
| tree | 2768456226ce5912779782a5949c5a6a61a7beba | |
| parent | 74cc0b2b66126e4598c4412ccbd879caa287ca81 (diff) | |
| download | gcc-8e1863eca8c8914cc5e05369dacdc5266cdca179.zip gcc-8e1863eca8c8914cc5e05369dacdc5266cdca179.tar.gz gcc-8e1863eca8c8914cc5e05369dacdc5266cdca179.tar.bz2 | |
re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b right away, to be more efficient for Ryzen and Intel)
PR target/80846
* config/rs6000/vsx.md (vextract_fp_from_shorth,
vextract_fp_from_shortl): Add element mode after mode in gen_vec_init*
calls.
From-SVN: r250784
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 4 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a6661bb..5d33a59 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2017-08-01 Jakub Jelinek <jakub@redhat.com> + + PR target/80846 + * config/rs6000/vsx.md (vextract_fp_from_shorth, + vextract_fp_from_shortl): Add element mode after mode in gen_vec_init* + calls. + 2017-08-01 Jerome Lambourg <lambourg@adacore.com> Doug Rupp <rupp@adacore.com> Olivier Hainque <hainque@adacore.com> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 2937499..c2c1e92 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4523,7 +4523,7 @@ inputs in half words 1,3,5,7 (IBM numbering). Use xxperm to move src half words 0,1,2,3 for the conversion instruction. */ v = gen_rtvec_v (16, rvals); - emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v))); + emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v))); emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1], operands[1], mask)); emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp)); @@ -4552,7 +4552,7 @@ inputs in half words 1,3,5,7 (IBM numbering). Use xxperm to move src half words 4,5,6,7 for the conversion instruction. */ v = gen_rtvec_v (16, rvals); - emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v))); + emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v))); emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1], operands[1], mask)); emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp)); |