mfmovd.c: Extend list of supported targets.

	* gcc.target/sh/mfmovd.c: Extend list of supported targets.
	* gcc.target/sh/struct-arg-dw2.c: Fix typo.
	* gcc.target/sh/sh4a-sincos.c: Make test SH4A only.
	* gcc.target/sh/sh4a-sincosf.c: Ditto.
	* gcc.target/sh/sh4a-cos.c: Ditto.
	* gcc.target/sh/sh4a-cosf.c: Ditto.
	* gcc.target/sh/sh4a-sin.c: Ditto.
	* gcc.target/sh/sh4a-sinf.c: Ditto.
	* gcc.target/sh/sh4a-fsrra.c: Ditto.
	* gcc.target/sh/sh4a-memmovua.c: Ditto.
	* gcc.target/sh/sh4a-bitmovua.c: Ditto.

From-SVN: r179295

12 files changed, 54 insertions, 61 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 01eed5c..86d8fc2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2011-09-27  Oleg Endo  <oleg.endo@t-online.de>
+
+	* gcc.target/sh/mfmovd.c: Extend list of supported targets.
+	* gcc.target/sh/struct-arg-dw2.c: Fix typo.
+	* gcc.target/sh/sh4a-sincos.c: Make test SH4A only.
+	* gcc.target/sh/sh4a-sincosf.c: Ditto.
+	* gcc.target/sh/sh4a-cos.c: Ditto.
+	* gcc.target/sh/sh4a-cosf.c: Ditto.
+	* gcc.target/sh/sh4a-sin.c: Ditto.
+	* gcc.target/sh/sh4a-sinf.c: Ditto.
+	* gcc.target/sh/sh4a-fsrra.c: Ditto.
+	* gcc.target/sh/sh4a-memmovua.c: Ditto.
+	* gcc.target/sh/sh4a-bitmovua.c: Ditto.
+
 2011-09-27  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/31489
diff --git a/gcc/testsuite/gcc.target/sh/mfmovd.c b/gcc/testsuite/gcc.target/sh/mfmovd.c
index c8e0094..b5653c7 100644
--- a/gcc/testsuite/gcc.target/sh/mfmovd.c
+++ b/gcc/testsuite/gcc.target/sh/mfmovd.c
@@ -1,7 +1,9 @@
+/* Verify that we generate fmov.d instructions to move doubles when -mfmovd 
+   option is enabled.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-mfmovd" } */
-/* { dg-skip-if "No double precision FPU support" { "sh*-*-*" } "-m2a-nofpu -m2a-single-only -m4-nofpu -m4-single-only -m4a-nofpu -m4a-single-only" { "" } }  */
-/* { dg-final { scan-assembler "fmov.d"} }  */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a" "-m2a-single" "-m4" "-m4-single" "-m4-100" "-m4-100-single" "-m4-200" "-m4-200-single" "-m4-300" "-m4-300-single" "-m4a" "-m4a-single" } }  */
+/* { dg-final { scan-assembler "fmov.d" } } */
 
 extern double g;
 
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-bitmovua.c b/gcc/testsuite/gcc.target/sh/sh4a-bitmovua.c
index 761c7b0..1c9ae6e 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-bitmovua.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-bitmovua.c
@@ -1,9 +1,9 @@
-/* Verify that we generate movua to load unaligned 32-bit values.  */
+/* Verify that we generate movua to load unaligned 32-bit values on SH4A.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O" } */
-/* { dg-final { scan-assembler-times "\tmovua\\.l\t" 6 } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" "-m4a-nofpu" } }  */
+/* { dg-final { scan-assembler-times "movua.l" 6 } } */
 
-#ifdef __SH4A__
 /* Aligned.  */
 struct s0 { long long d : 32; } x0;
 long long f0() {
@@ -63,11 +63,5 @@ struct u4 { long long c : 32; unsigned long long d : 32; } y4;
 unsigned long long g4() {
   return y4.d;
 }
-#else
-asm ("movua.l\t");
-asm ("movua.l\t");
-asm ("movua.l\t");
-asm ("movua.l\t");
-asm ("movua.l\t");
-asm ("movua.l\t");
-#endif
+
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-cos.c b/gcc/testsuite/gcc.target/sh/sh4a-cos.c
index 198d41f..c2e421c 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-cos.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-cos.c
@@ -1,13 +1,11 @@
 /* Verify that we generate single-precision sine and cosine approximate
-   (fsca) in fast math mode.  */
+   (fsca) in fast math mode on SH4A with FPU.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler "\tfsca\t" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler "fsca" } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 double test(double f) { return cos(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-cosf.c b/gcc/testsuite/gcc.target/sh/sh4a-cosf.c
index f78c140..68bb20f 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-cosf.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-cosf.c
@@ -1,13 +1,11 @@
 /* Verify that we generate single-precision sine and cosine approximate
-   (fsca) in fast math mode.  */
+   (fsca) in fast math mode on SH4A with FPU.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler "\tfsca\t" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler "fsca" } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 float test(float f) { return cosf(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-fsrra.c b/gcc/testsuite/gcc.target/sh/sh4a-fsrra.c
index c8f04e4..4ce2e28 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-fsrra.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-fsrra.c
@@ -1,13 +1,11 @@
 /* Verify that we generate single-precision square root reciprocal
-   approximate (fsrra) in fast math mode.  */
+   approximate (fsrra) in fast math mode on SH4A with FPU.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler "\tfsrra\t" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler "fsrra" } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 float test(float f) { return 1 / sqrtf(f); }
-#else
-asm ("fsrra\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-memmovua.c b/gcc/testsuite/gcc.target/sh/sh4a-memmovua.c
index 359dd8f..7e817c4 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-memmovua.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-memmovua.c
@@ -1,17 +1,14 @@
 /* Verify that we generate movua to copy unaligned memory regions to
-   32-bit-aligned addresses.  */
+   32-bit-aligned addresses on SH4A.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O" } */
-/* { dg-final { scan-assembler-times "\tmovua\\.l\t" 2 } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" "-m4a-nofpu" } }  */
+/* { dg-final { scan-assembler-times "movua.l" 2 } } */
 
-#ifdef __SH4A__
 #include <string.h>
 
 struct s { int i; char a[10], b[10]; } x;
 int f() {
   memcpy(x.a, x.b, 10);
 }
-#else
-asm ("movua.l\t+");
-asm ("movua.l\t+");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-sin.c b/gcc/testsuite/gcc.target/sh/sh4a-sin.c
index 9f46f60..cd8f078 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-sin.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-sin.c
@@ -1,13 +1,11 @@
 /* Verify that we generate single-precision sine and cosine approximate
-   (fsca) in fast math mode.  */
+   (fsca) in fast math mode on SH4A with FPU.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler "\tfsca\t" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler "fsca" } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 double test(double f) { return sin(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-sincos.c b/gcc/testsuite/gcc.target/sh/sh4a-sincos.c
index f429379..423dda1 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-sincos.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-sincos.c
@@ -3,12 +3,10 @@
    sine and cosine.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler-times "\tfsca\t" 1 } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler-times "fsca" 1 } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 double test(double f) { return sin(f) + cos(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-sincosf.c b/gcc/testsuite/gcc.target/sh/sh4a-sincosf.c
index 42913db..0ca33e3 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-sincosf.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-sincosf.c
@@ -3,12 +3,10 @@
    sine and cosine.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler-times "\tfsca\t" 1 } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler-times "fsca" 1 } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 float test(float f) { return sinf(f) + cosf(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/sh4a-sinf.c b/gcc/testsuite/gcc.target/sh/sh4a-sinf.c
index 2a2343f..4d9abea 100644
--- a/gcc/testsuite/gcc.target/sh/sh4a-sinf.c
+++ b/gcc/testsuite/gcc.target/sh/sh4a-sinf.c
@@ -1,13 +1,11 @@
 /* Verify that we generate single-precision sine and cosine approximate
-   (fsca) in fast math mode.  */
+   (fsca) in fast math mode on SH4A with FPU.  */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-O -ffast-math" } */
-/* { dg-final { scan-assembler "\tfsca\t" } } */
+/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m4a" "-m4a-single" "-m4a-single-only" } }  */
+/* { dg-final { scan-assembler "fsca" } } */
 
-#if defined __SH4A__ && ! defined __SH4_NOFPU__
 #include <math.h>
 
 float test(float f) { return sinf(f); }
-#else
-asm ("fsca\t");
-#endif
+
diff --git a/gcc/testsuite/gcc.target/sh/struct-arg-dw2.c b/gcc/testsuite/gcc.target/sh/struct-arg-dw2.c
index effd13d..81f80df 100644
--- a/gcc/testsuite/gcc.target/sh/struct-arg-dw2.c
+++ b/gcc/testsuite/gcc.target/sh/struct-arg-dw2.c
@@ -1,4 +1,4 @@
-/* Verify that we don't generate fame related insn against stack adjustment
+/* Verify that we don't generate frame related insn against stack adjustment
    for the object sent partially in registers. */
 /* { dg-do compile { target "sh*-*-*" } } */
 /* { dg-options "-g" } */