[multiple changes]

Tue Jan 12 14:05:37 1999   David Edelsohn  <edelsohn@mhpcc.edu>
        * rs6000.c (print_operand, cases 'm' and 'M'): Do not depend on
        HOST_WIDE_INT word-size.
        (rs6000_stack_info): Remove redundant alignment of fpmem.
Tue Jan 12 14:05:37 1999   Richard Henderson  <rth@cygnus.com>
        * rs6000.c (short_cint_operand): Remove CONSTANT_P_RTX handling.
        (u_short_cint_operand, reg_or_cint_operand, logical_operand): Likewise.
        (input_operand): Adjust CONSTANT_P_RTX handling.
        * rs6000.h (PREDICATE_CODES): Remove CONSTANT_P_RTX references.
        * rs6000.md (movsi): Adjust CONSTANT_P_RTX handling.
        (movhi, movqi): Remove CONSANT_P_RTX handling.
        (movdi): Adjust CONSTANT_P_RTX handling.

From-SVN: r24640

4 files changed, 60 insertions, 42 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 914da5e..ed6a9ac 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+Tue Jan 12 14:05:37 1999   David Edelsohn  <edelsohn@mhpcc.edu>
+
+	* rs6000.c (print_operand, cases 'm' and 'M'): Do not depend on
+	HOST_WIDE_INT word-size.
+	(rs6000_stack_info): Remove redundant alignment of fpmem.
+
+Tue Jan 12 14:05:37 1999   Richard Henderson  <rth@cygnus.com>
+
+	* rs6000.c (short_cint_operand): Remove CONSTANT_P_RTX handling.
+	(u_short_cint_operand, reg_or_cint_operand, logical_operand): Likewise.
+	(input_operand): Adjust CONSTANT_P_RTX handling.
+	* rs6000.h (PREDICATE_CODES): Remove CONSTANT_P_RTX references.
+	* rs6000.md (movsi): Adjust CONSTANT_P_RTX handling.
+	(movhi, movqi): Remove CONSANT_P_RTX handling.
+	(movdi): Adjust CONSTANT_P_RTX handling.
+
 Tue Jan 12 10:23:24 1999  Stan Cox  <scox@cygnus.com>
 
 	* mips.md (call_value_internal3c): New pattern for -mips16 -mlong-calls.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f8b1457..ac5efe5 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -497,8 +497,7 @@ short_cint_operand (op, mode)
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return ((GET_CODE (op) == CONST_INT
-	   && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)
-	  || GET_CODE (op) == CONSTANT_P_RTX);
+	   && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000));
 }
 
 /* Similar for a unsigned D field.  */
@@ -509,8 +508,7 @@ u_short_cint_operand (op, mode)
      enum machine_mode mode ATTRIBUTE_UNUSED;
 {
   return ((GET_CODE (op) == CONST_INT
-	   && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0)
-	  || GET_CODE (op) == CONSTANT_P_RTX);
+	   && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0));
 }
 
 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field.  */
@@ -598,7 +596,6 @@ reg_or_cint_operand (op, mode)
     enum machine_mode mode;
 {
      return (GET_CODE (op) == CONST_INT
-	     || GET_CODE (op) == CONSTANT_P_RTX
 	     || gpc_reg_operand (op, mode));
 }
 
@@ -883,8 +880,7 @@ logical_operand (op, mode)
   return (gpc_reg_operand (op, mode)
 	  || (GET_CODE (op) == CONST_INT
 	      && ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0
-		  || (INTVAL (op) & 0xffff) == 0))
-	  || GET_CODE (op) == CONSTANT_P_RTX);
+		  || (INTVAL (op) & 0xffff) == 0)));
 }
 
 /* Return 1 if C is a constant that is not a logical operand (as
@@ -1110,6 +1106,10 @@ input_operand (op, mode)
   if (memory_operand (op, mode))
     return 1;
 
+  /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary.  */
+  if (GET_CODE (op) == CONST && GET_CODE (XEXP (op, 0)) == CONSTANT_P_RTX)
+    return 1;
+
   /* For floating-point, easy constants are valid.  */
   if (GET_MODE_CLASS (mode) == MODE_FLOAT
       && CONSTANT_P (op)
@@ -1119,7 +1119,6 @@ input_operand (op, mode)
   /* Allow any integer constant.  */
   if (GET_MODE_CLASS (mode) == MODE_INT
       && (GET_CODE (op) == CONST_INT
-	  || GET_CODE (op) == CONSTANT_P_RTX
 	  || GET_CODE (op) == CONST_DOUBLE))
     return 1;
 
@@ -2747,15 +2746,15 @@ print_operand (file, x, code)
       /* If the high bit is set and the low bit is not, the value is zero.
 	 If the high bit is zero, the value is the first 1 bit we find from
 	 the left.  */
-      if (val < 0 && (val & 1) == 0)
+      if ((val & 0x80000000) && ((val & 1) == 0))
 	{
 	  putc ('0', file);
 	  return;
 	}
-      else if (val >= 0)
+      else if ((val & 0x80000000) == 0)
 	{
 	  for (i = 1; i < 32; i++)
-	    if ((val <<= 1) < 0)
+	    if ((val <<= 1) & 0x80000000)
 	      break;
 	  fprintf (file, "%d", i);
 	  return;
@@ -2782,7 +2781,7 @@ print_operand (file, x, code)
       /* If the low bit is set and the high bit is not, the value is 31.
 	 If the low bit is zero, the value is the first 1 bit we find from
 	 the right.  */
-      if ((val & 1) && val >= 0)
+      if ((val & 1) && ((val & 0x80000000) == 0))
 	{
 	  fputs ("31", file);
 	  return;
@@ -2802,7 +2801,7 @@ print_operand (file, x, code)
       /* Otherwise, look for the first 0 bit from the left.  The result is its
 	 number minus 1. We know the high-order bit is one.  */
       for (i = 0; i < 32; i++)
-	if ((val <<= 1) >= 0)
+	if (((val <<= 1) & 0x80000000) == 0)
 	  break;
 
       fprintf (file, "%d", i);
@@ -3448,7 +3447,6 @@ rs6000_stack_info ()
 	}
     }
 
-
   /* Determine if we need to save the link register */
   if (regs_ever_live[65]
       || (DEFAULT_ABI == ABI_AIX && profile_flag)
@@ -3475,13 +3473,6 @@ rs6000_stack_info ()
 	info_ptr->cr_size = reg_size;
     }
 
-  /* Ensure that fp_save_offset will be aligned to an 8-byte boundary. */
-  if (info_ptr->fpmem_p)
-    {
-      info_ptr->gp_size = RS6000_ALIGN (info_ptr->gp_size, 8);
-      info_ptr->main_size = RS6000_ALIGN (info_ptr->main_size, 8);
-    }
-
   /* Determine various sizes */
   info_ptr->reg_size     = reg_size;
   info_ptr->fixed_size   = RS6000_SAVE_AREA;
@@ -3535,6 +3526,7 @@ rs6000_stack_info ()
       break;
     }
 
+  /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */
   if (info_ptr->fpmem_p
       && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8)
     info_ptr->fpmem_size += reg_size;
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index e5e6991..889ef98 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
-   Copyright (C) 1992, 93-7, 1998 Free Software Foundation, Inc.
+   Copyright (C) 1992, 93-8, 1999 Free Software Foundation, Inc.
    Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 This file is part of GNU CC.
@@ -3169,15 +3169,15 @@ do {									\
 /* Define the codes that are matched by predicates in rs6000.c.  */
 
 #define PREDICATE_CODES						\
-  {"short_cint_operand", {CONST_INT, CONSTANT_P_RTX}},		\
-  {"u_short_cint_operand", {CONST_INT, CONSTANT_P_RTX}},	\
+  {"short_cint_operand", {CONST_INT}},				\
+  {"u_short_cint_operand", {CONST_INT}},			\
   {"non_short_cint_operand", {CONST_INT}},			\
   {"gpc_reg_operand", {SUBREG, REG}},				\
   {"cc_reg_operand", {SUBREG, REG}},				\
-  {"reg_or_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
+  {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, 		\
   {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}},	\
-  {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
-  {"reg_or_cint_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
+  {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, 	\
+  {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, 		\
   {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}},		\
   {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}},		\
   {"easy_fp_constant", {CONST_DOUBLE}},				\
@@ -3186,12 +3186,11 @@ do {									\
   {"volatile_mem_operand", {MEM}},				\
   {"offsettable_addr_operand", {REG, SUBREG, PLUS}},		\
   {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}},	\
-  {"add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}},	\
+  {"add_operand", {SUBREG, REG, CONST_INT}},			\
   {"non_add_cint_operand", {CONST_INT}},			\
-  {"and_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}},	\
-  {"and64_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX,	\
-		     CONST_DOUBLE}},				\
-  {"logical_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
+  {"and_operand", {SUBREG, REG, CONST_INT}},			\
+  {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}},	\
+  {"logical_operand", {SUBREG, REG, CONST_INT}}, 		\
   {"non_logical_cint_operand", {CONST_INT}},			\
   {"mask_operand", {CONST_INT}},				\
   {"mask64_operand", {CONST_INT, CONST_DOUBLE}},		\
@@ -3199,7 +3198,7 @@ do {									\
   {"fpmem_operand", {REG}},					\
   {"call_operand", {SYMBOL_REF, REG}},				\
   {"current_file_function_operand", {SYMBOL_REF}},		\
-  {"input_operand", {SUBREG, MEM, REG, CONST_INT, CONSTANT_P_RTX, \
+  {"input_operand", {SUBREG, MEM, REG, CONST_INT, 		\
 		     CONST_DOUBLE, SYMBOL_REF}}, 		\
   {"load_multiple_operation", {PARALLEL}},			\
   {"store_multiple_operation", {PARALLEL}},			\
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b3efed9..ac7008f 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,5 +1,5 @@
 ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;; Copyright (C) 1990, 91-97, 1998 Free Software Foundation, Inc.
+;; Copyright (C) 1990, 91-98, 1999 Free Software Foundation, Inc.
 ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 ;; This file is part of GNU CC.
@@ -5399,6 +5399,14 @@
   if (GET_CODE (operands[1]) == CONST_DOUBLE)
     operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
 
+  /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary.  */
+  if (GET_CODE (operands[1]) == CONST
+      && GET_CODE (XEXP (operands[1], 0)) == CONSTANT_P_RTX)
+    {
+      emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
+      DONE;
+    }
+
   /* Use default pattern for address of ELF small data */
   if (TARGET_ELF
       && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
@@ -5420,8 +5428,7 @@
       && !flag_pic
       && CONSTANT_P (operands[1])
       && GET_CODE (operands[1]) != HIGH
-      && GET_CODE (operands[1]) != CONST_INT
-      && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+      && GET_CODE (operands[1]) != CONST_INT)
     {
       rtx target = (reload_completed || reload_in_progress)
 			? operands[0] : gen_reg_rtx (SImode);
@@ -5475,7 +5482,6 @@
   if ((!TARGET_WINDOWS_NT || DEFAULT_ABI != ABI_NT)
       && CONSTANT_P (operands[1])
       && GET_CODE (operands[1]) != CONST_INT
-      && GET_CODE (operands[1]) != CONSTANT_P_RTX
       && GET_CODE (operands[1]) != HIGH
       && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1]))
     {
@@ -5574,8 +5580,7 @@
     operands[1] = force_reg (HImode, operands[1]);
 
   if (CONSTANT_P (operands[1])
-      && GET_CODE (operands[1]) != CONST_INT
-      && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+      && GET_CODE (operands[1]) != CONST_INT)
     {
       operands[1] = force_const_mem (HImode, operands[1]);
       if (! memory_address_p (HImode, XEXP (operands[1], 0))
@@ -5611,8 +5616,7 @@
     operands[1] = force_reg (QImode, operands[1]);
 
   if (CONSTANT_P (operands[1])
-      && GET_CODE (operands[1]) != CONST_INT
-      && GET_CODE (operands[1]) != CONSTANT_P_RTX)
+      && GET_CODE (operands[1]) != CONST_INT)
     {
       operands[1] = force_const_mem (QImode, operands[1]);
       if (! memory_address_p (QImode, XEXP (operands[1], 0))
@@ -6012,11 +6016,18 @@
 	 )
     operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
 
+  /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary.  */
+  if (GET_CODE (operands[1]) == CONST
+      && GET_CODE (XEXP (operands[1], 0)) == CONSTANT_P_RTX)
+    {
+      emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
+      DONE;
+    }
+
   if (TARGET_64BIT
       && CONSTANT_P (operands[1])
 #if HOST_BITS_PER_WIDE_INT == 32
       && GET_CODE (operands[1]) != CONST_INT
-      && GET_CODE (operands[1]) != CONSTANT_P_RTX
 #endif
       && ! easy_fp_constant (operands[1], DImode)
       && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1]))