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| author | Uros Bizjak <ubizjak@gmail.com> | 2018-06-28 21:02:02 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-06-28 21:02:02 +0200 |
| commit | 81c8283fb6fe366ce6b1615cf3d05427e2f91d14 (patch) | |
| tree | 4413896b17ffbcf90b302f017c21f89f41999eb3 | |
| parent | 9cd1665b997d3cdf4d6984b6268d3d9da19dcba8 (diff) | |
| download | gcc-81c8283fb6fe366ce6b1615cf3d05427e2f91d14.zip gcc-81c8283fb6fe366ce6b1615cf3d05427e2f91d14.tar.gz gcc-81c8283fb6fe366ce6b1615cf3d05427e2f91d14.tar.bz2 | |
re PR target/86348 (ICE: in curr_insn_transform, at lra-constraints.c:3919: unable to generate reloads for: vec_extractv4si_0_zext_sse4)
PR target/86348
* config/i386/sse.md (*vec_extractv4si_0_zext_sse4): Use
alternative 0 in preferred_for_speed attribute.
testsuite/ChangeLog:
PR target/86348
* gcc.target/i386/pr86348.c: New test.
From-SVN: r262228
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr86348.c | 12 |
4 files changed, 24 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1edab9e..09b24e6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-06-28 Uros Bizjak <ubizjak@gmail.com> + + PR target/86348 + * config/i386/sse.md (*vec_extractv4si_0_zext_sse4): Use + alternative 0 in preferred_for_speed attribute. + 2018-06-28 Paul Koning <ni1d@arrl.net> * config/pdp11/pdp11-protos.h (pdp11_shift_length): New function. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2d4e495..0420da8 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -13715,7 +13715,7 @@ "#" [(set_attr "isa" "x64,*,avx512f") (set (attr "preferred_for_speed") - (cond [(eq_attr "alternative" "1") + (cond [(eq_attr "alternative" "0") (symbol_ref "TARGET_INTER_UNIT_MOVES_FROM_VEC") ] (symbol_ref "true")))]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b7a47ed..197a468 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-06-28 Uros Bizjak <ubizjak@gmail.com> + + PR target/86348 + * gcc.target/i386/pr86348.c: New test. + 2018-06-28 Wilco Dijkstra <wdijkstr@arm.com> * gcc.target/aarch64/f16_mov_immediate_3.c: Fix testcase. diff --git a/gcc/testsuite/gcc.target/i386/pr86348.c b/gcc/testsuite/gcc.target/i386/pr86348.c new file mode 100644 index 0000000..c4a3c9f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr86348.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O -mtune=athlon -msse4" } */ + +int i; +unsigned __attribute__ ((__vector_size__ (16))) v; + +void +foo (void) +{ + v *= i; + i = i > -(long long) v[0]; +} |