diff options
author | Nathan Froyd <froydnj@codesourcery.com> | 2009-01-07 23:21:26 +0000 |
---|---|---|
committer | Nathan Froyd <froydnj@gcc.gnu.org> | 2009-01-07 23:21:26 +0000 |
commit | 7da13f1d80b35d3e00ef1a4c785f49f58d8fa767 (patch) | |
tree | 4b484771ffe98d0fb33fb83d04d5ffbf39583138 | |
parent | c4bca01b27554f8a68a9391b278788bc1092c21f (diff) | |
download | gcc-7da13f1d80b35d3e00ef1a4c785f49f58d8fa767.zip gcc-7da13f1d80b35d3e00ef1a4c785f49f58d8fa767.tar.gz gcc-7da13f1d80b35d3e00ef1a4c785f49f58d8fa767.tar.bz2 |
rs6000.c (rs6000_legitimize_address): Check for non-word-aligned REG+CONST addressing.
gcc/
* config/rs6000/rs6000.c (rs6000_legitimize_address): Check for
non-word-aligned REG+CONST addressing.
gcc/testsuite/
* gcc.c-torture/compile/20090107-1.c: New test.
Co-Authored-By: Alan Modra <amodra@bigpond.net.au>
From-SVN: r143171
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 5 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.c-torture/compile/20090107-1.c | 25 |
4 files changed, 40 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92ffefe..29c4ba4a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2009-01-07 Nathan Froyd <froydnj@codesourcery.com> + Alan Modra <amodra@bigpond.net.au> + + * config/rs6000/rs6000.c (rs6000_legitimize_address): Check for + non-word-aligned REG+CONST addressing. + 2009-01-07 Uros Bizjak <ubizjak@gmail.com> PR target/38706 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 49551f6..6d7327b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3804,7 +3804,10 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, && GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000 - && !(SPE_VECTOR_MODE (mode) + && !((TARGET_POWERPC64 + && (mode == DImode || mode == TImode) + && (INTVAL (XEXP (x, 1)) & 3) != 0) + || SPE_VECTOR_MODE (mode) || ALTIVEC_VECTOR_MODE (mode) || (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode || mode == DImode || mode == DDmode diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e0fb095..ccd555e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2009-01-07 Nathan Froyd <froydnj@codesourcery.com> + Alan Modra <amodra@bigpond.net.au> + + * gcc.c-torture/compile/20090107-1.c: New test. + 2009-01-07 Uros Bizjak <ubizjak@gmail.com> PR target/38706 diff --git a/gcc/testsuite/gcc.c-torture/compile/20090107-1.c b/gcc/testsuite/gcc.c-torture/compile/20090107-1.c new file mode 100644 index 0000000..b5d4c1a --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/20090107-1.c @@ -0,0 +1,25 @@ +/* Verify that we don't ICE by forming invalid addresses for unaligned + doubleword loads (originally for PPC64). */ + +struct a +{ + unsigned int x; + unsigned short y; +} __attribute__((packed)); + +struct b { + struct a rep; + unsigned long long seq; +} __attribute__((packed)); + +struct c { + int x; + struct a a[5460]; + struct b b; +}; + +extern void use_ull(unsigned long long); +extern void f(struct c *i) { + use_ull(i->b.seq); + return; +} |