Rename -mprefixed-addr to be -mprefixed, and document it.

2020-02-11  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/predicates.md (cint34_operand): Rename the
	-mprefixed-addr option to be -mprefixed.
	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
	the -mprefixed-addr option to be -mprefixed.
	(OTHER_FUTURE_MASKS): Likewise.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
	the -mprefixed-addr option to be -mprefixed.  Change error
	messages to refer to -mprefixed.
	(num_insns_constant_gpr): Rename the -mprefixed-addr option to be
	-mprefixed.
	(rs6000_legitimate_offset_address_p): Likewise.
	(rs6000_mode_dependent_address): Likewise.
	(rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
	"-mprefixed" for target attributes and pragmas.
	(address_to_insn_form): Rename the -mprefixed-addr option to be
	-mprefixed.
	(rs6000_adjust_insn_length): Likewise.
	* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
	-mprefixed-addr option to be -mprefixed.
	(ASM_OUTPUT_OPCODE): Likewise.
	* config/rs6000/rs6000.md (prefixed insn attribute): Rename the
	-mprefixed-addr option to be -mprefixed.
	* config/rs6000/rs6000.opt (-mprefixed): Rename the
	-mprefixed-addr option to be prefixed.  Change the option from
	being undocumented to being documented.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document the
	-mprefixed option.  Update the -mpcrel documentation to mention
	-mprefixed.

8 files changed, 68 insertions, 27 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7ddb6c3..a124ed5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,35 @@
+2020-02-11  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/predicates.md (cint34_operand): Rename the
+	-mprefixed-addr option to be -mprefixed.
+	* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
+	the -mprefixed-addr option to be -mprefixed.
+	(OTHER_FUTURE_MASKS): Likewise.
+	(POWERPC_MASKS): Likewise.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
+	the -mprefixed-addr option to be -mprefixed.  Change error
+	messages to refer to -mprefixed.
+	(num_insns_constant_gpr): Rename the -mprefixed-addr option to be
+	-mprefixed.
+	(rs6000_legitimate_offset_address_p): Likewise.
+	(rs6000_mode_dependent_address): Likewise.
+	(rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
+	"-mprefixed" for target attributes and pragmas.
+	(address_to_insn_form): Rename the -mprefixed-addr option to be
+	-mprefixed.
+	(rs6000_adjust_insn_length): Likewise.
+	* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
+	-mprefixed-addr option to be -mprefixed.
+	(ASM_OUTPUT_OPCODE): Likewise.
+	* config/rs6000/rs6000.md (prefixed insn attribute): Rename the
+	-mprefixed-addr option to be -mprefixed.
+	* config/rs6000/rs6000.opt (-mprefixed): Rename the
+	-mprefixed-addr option to be prefixed.  Change the option from
+	being undocumented to being documented.
+	* doc/invoke.texi (RS/6000 and PowerPC Options): Document the
+	-mprefixed option.  Update the -mpcrel documentation to mention
+	-mprefixed.
+
 2020-02-11  Hans-Peter Nilsson  <hp@axis.com>
 
 	* ira-conflicts.c (print_hard_reg_set): Correct output for sets
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index fb6f223..bf04e4d 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -306,7 +306,7 @@
 (define_predicate "cint34_operand"
   (match_code "const_int")
 {
-  if (!TARGET_PREFIXED_ADDR)
+  if (!TARGET_PREFIXED)
     return 0;
 
   return SIGNED_INTEGER_34BIT_P (INTVAL (op));
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 83604b6..193d77e 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -79,11 +79,11 @@
    is fully functional.  */
 #define ISA_FUTURE_MASKS_SERVER	(ISA_3_0_MASKS_SERVER			\
 				 | OPTION_MASK_FUTURE			\
-				 | OPTION_MASK_PREFIXED_ADDR)
+				 | OPTION_MASK_PREFIXED)
 
 /* Flags that need to be turned off if -mno-future.  */
 #define OTHER_FUTURE_MASKS	(OPTION_MASK_PCREL			\
-				 | OPTION_MASK_PREFIXED_ADDR)
+				 | OPTION_MASK_PREFIXED)
 
 /* Flags that need to be turned off if -mno-power9-vector.  */
 #define OTHER_P9_VECTOR_MASKS	(OPTION_MASK_FLOAT128_HW		\
@@ -143,7 +143,7 @@
 				 | OPTION_MASK_POWERPC64		\
 				 | OPTION_MASK_PPC_GFXOPT		\
 				 | OPTION_MASK_PPC_GPOPT		\
-				 | OPTION_MASK_PREFIXED_ADDR		\
+				 | OPTION_MASK_PREFIXED			\
 				 | OPTION_MASK_QUAD_MEMORY		\
 				 | OPTION_MASK_QUAD_MEMORY_ATOMIC	\
 				 | OPTION_MASK_RECIP_PRECISION		\
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index fc68976..cf73e11 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -4013,22 +4013,22 @@ rs6000_option_override_internal (bool global_init_p)
       rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW;
     }
 
-  /* -mprefixed-addr (and hence -mpcrel) requires -mcpu=future.  */
-  if (TARGET_PREFIXED_ADDR && !TARGET_FUTURE)
+  /* -mprefixed (and hence -mpcrel) requires -mcpu=future.  */
+  if (TARGET_PREFIXED && !TARGET_FUTURE)
     {
       if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
 	error ("%qs requires %qs", "-mpcrel", "-mcpu=future");
-      else if ((rs6000_isa_flags_explicit & OPTION_MASK_PREFIXED_ADDR) != 0)
-	error ("%qs requires %qs", "-mprefixed-addr", "-mcpu=future");
+      else if ((rs6000_isa_flags_explicit & OPTION_MASK_PREFIXED) != 0)
+	error ("%qs requires %qs", "-mprefixed", "-mcpu=future");
 
-      rs6000_isa_flags &= ~(OPTION_MASK_PCREL | OPTION_MASK_PREFIXED_ADDR);
+      rs6000_isa_flags &= ~(OPTION_MASK_PCREL | OPTION_MASK_PREFIXED);
     }
 
   /* -mpcrel requires prefixed load/store addressing.  */
-  if (TARGET_PCREL && !TARGET_PREFIXED_ADDR)
+  if (TARGET_PCREL && !TARGET_PREFIXED)
     {
       if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
-	error ("%qs requires %qs", "-mpcrel", "-mprefixed-addr");
+	error ("%qs requires %qs", "-mpcrel", "-mprefixed");
 
       rs6000_isa_flags &= ~OPTION_MASK_PCREL;
     }
@@ -5571,7 +5571,7 @@ num_insns_constant_gpr (HOST_WIDE_INT value)
     return 1;
 
   /* PADDI can support up to 34 bit signed integers.  */
-  else if (TARGET_PREFIXED_ADDR && SIGNED_INTEGER_34BIT_P (value))
+  else if (TARGET_PREFIXED && SIGNED_INTEGER_34BIT_P (value))
     return 1;
 
   else if (TARGET_POWERPC64)
@@ -7960,7 +7960,7 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x,
       break;
     }
 
-  if (TARGET_PREFIXED_ADDR)
+  if (TARGET_PREFIXED)
     return SIGNED_34BIT_OFFSET_EXTRA_P (offset, extra);
   else
     return SIGNED_16BIT_OFFSET_EXTRA_P (offset, extra);
@@ -8954,7 +8954,7 @@ rs6000_mode_dependent_address (const_rtx addr)
 	{
 	  HOST_WIDE_INT val = INTVAL (XEXP (addr, 1));
 	  HOST_WIDE_INT extra = TARGET_POWERPC64 ? 8 : 12;
-	  if (TARGET_PREFIXED_ADDR)
+	  if (TARGET_PREFIXED)
 	    return !SIGNED_34BIT_OFFSET_EXTRA_P (val, extra);
 	  else
 	    return !SIGNED_16BIT_OFFSET_EXTRA_P (val, extra);
@@ -22884,7 +22884,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
   { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
   { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
-  { "prefixed-addr",		OPTION_MASK_PREFIXED_ADDR,	false, true  },
+  { "prefixed",			OPTION_MASK_PREFIXED,		false, true  },
   { "quad-memory",		OPTION_MASK_QUAD_MEMORY,	false, true  },
   { "quad-memory-atomic",	OPTION_MASK_QUAD_MEMORY_ATOMIC,	false, true  },
   { "recip-precision",		OPTION_MASK_RECIP_PRECISION,	false, true  },
@@ -24849,7 +24849,7 @@ address_to_insn_form (rtx addr,
   /* Large offsets must be prefixed.  */
   if (!SIGNED_INTEGER_16BIT_P (offset))
     {
-      if (TARGET_PREFIXED_ADDR)
+      if (TARGET_PREFIXED)
 	return INSN_FORM_PREFIXED_NUMERIC;
 
       return INSN_FORM_BAD;
@@ -24889,7 +24889,7 @@ address_to_insn_form (rtx addr,
       if ((offset & 3) == 0)
 	return INSN_FORM_DS;
 
-      else if (TARGET_PREFIXED_ADDR)
+      else if (TARGET_PREFIXED)
 	return INSN_FORM_PREFIXED_NUMERIC;
 
       else
@@ -24900,7 +24900,7 @@ address_to_insn_form (rtx addr,
       if ((offset & 15) == 0)
 	return INSN_FORM_DQ;
 
-      else if (TARGET_PREFIXED_ADDR)
+      else if (TARGET_PREFIXED)
 	return INSN_FORM_PREFIXED_NUMERIC;
 
       else
@@ -25150,7 +25150,7 @@ rs6000_asm_output_opcode (FILE *stream)
 int
 rs6000_adjust_insn_length (rtx_insn *insn, int length)
 {
-  if (TARGET_PREFIXED_ADDR && NONJUMP_INSN_P (insn))
+  if (TARGET_PREFIXED && NONJUMP_INSN_P (insn))
     {
       rtx pattern = PATTERN (insn);
       if (GET_CODE (pattern) != USE && GET_CODE (pattern) != CLOBBER
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index a7de4e6..1697186 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -2558,7 +2558,7 @@ typedef struct GTY(()) machine_function
 #define FINAL_PRESCAN_INSN(INSN, OPERANDS, NOPERANDS)			\
 do									\
   {									\
-    if (TARGET_PREFIXED_ADDR)						\
+    if (TARGET_PREFIXED)						\
       rs6000_final_prescan_insn (INSN, OPERANDS, NOPERANDS);		\
   }									\
 while (0)
@@ -2568,7 +2568,7 @@ while (0)
 #define ASM_OUTPUT_OPCODE(STREAM, OPCODE)				\
   do									\
     {									\
-     if (TARGET_PREFIXED_ADDR)						\
+     if (TARGET_PREFIXED)						\
        rs6000_asm_output_opcode (STREAM);				\
     }									\
   while (0)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 50db67f..3da7b1e 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -265,7 +265,7 @@
 ;; insns.  The default "length" attribute will also be adjusted by default to
 ;; be 12 bytes.
 (define_attr "prefixed" "no,yes"
-  (cond [(ior (match_test "!TARGET_PREFIXED_ADDR")
+  (cond [(ior (match_test "!TARGET_PREFIXED")
 	      (match_test "!NONJUMP_INSN_P (insn)"))
 	 (const_string "no")
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 4cfafd1..ed3b44a 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -570,8 +570,8 @@ mfuture
 Target Report Mask(FUTURE) Var(rs6000_isa_flags)
 Use instructions for a future architecture.
 
-mprefixed-addr
-Target Undocumented Mask(PREFIXED_ADDR) Var(rs6000_isa_flags)
+mprefixed
+Target Report Mask(PREFIXED) Var(rs6000_isa_flags)
 Generate (do not generate) prefixed memory instructions.
 
 mpcrel
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 35b341e..fa98e2f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1208,7 +1208,8 @@ See RS/6000 and PowerPC Options.
 -mfloat128  -mno-float128  -mfloat128-hardware  -mno-float128-hardware @gol
 -mgnu-attribute  -mno-gnu-attribute @gol
 -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
--mstack-protector-guard-offset=@var{offset} -mpcrel -mno-pcrel}
+-mstack-protector-guard-offset=@var{offset} -mprefixed -mno-prefixed @gol
+-mpcrel -mno-pcrel}
 
 @emph{RX Options}
 @gccoptlist{-m64bit-doubles  -m32bit-doubles  -fpu  -nofpu@gol
@@ -22327,7 +22328,6 @@ faster on processors with 32-bit busses at the expense of more memory.
 aligns structures containing the above types differently than
 most published application binary interface specifications for the m68k.
 
-@item -mpcrel
 @opindex mpcrel
 Use the pc-relative addressing mode of the 68000 directly, instead of
 using a global offset table.  At present, this option implies @option{-fpic},
@@ -26415,7 +26415,16 @@ the offset with a symbol reference to a canary in the TLS block.
 @opindex mpcrel
 @opindex mno-pcrel
 Generate (do not generate) pc-relative addressing when the option
-@option{-mcpu=future} is used.
+@option{-mcpu=future} is used.  The @option{-mpcrel} option requires
+that the medium code model (@option{-mcmodel=medium}) and prefixed
+addressing (@option{-mprefixed}) options are enabled.
+
+@item -mprefixed
+@itemx -mno-prefixed
+@opindex mprefixed
+@opindex mno-prefixed
+Generate (do not generate) addressing modes using prefixed load and
+store instructions when the option @option{-mcpu=future} is used.
 @end table
 
 @node RX Options