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authorAlex Coplan <alex.coplan@arm.com>2020-09-10 17:05:40 +0100
committerAlex Coplan <alex.coplan@arm.com>2020-09-10 17:10:31 +0100
commit786177a3fc9229f964058ae37571f2468ca1dce4 (patch)
tree29b6ac81451c0ec675ef66857b33ee37b3b9b084
parent36efcd7de0431b099087d8ae1ad358b0e088a250 (diff)
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aarch64: Add support for Armv8-R
This adds support for Armv8-R AArch64 to GCC. It adds the -march value armv8-r and sets the ACLE feature macro __ARM_ARCH_PROFILE correctly when -march is set to armv8-r. gcc/ChangeLog: * common/config/aarch64/aarch64-common.c (aarch64_get_extension_string_for_isa_flags): Don't force +crc for Armv8-R. * config/aarch64/aarch64-arches.def: Add entry for Armv8-R. * config/aarch64/aarch64-c.c (aarch64_define_unconditional_macros): Set __ARM_ARCH_PROFILE correctly for Armv8-R. * config/aarch64/aarch64.h (AARCH64_FL_V8_R): New. (AARCH64_FL_FOR_ARCH8_R): New. (AARCH64_ISA_V8_R): New. * doc/invoke.texi: Add Armv8-R to architecture table. gcc/testsuite/ChangeLog: * gcc.target/aarch64/acle/armv8-r.c: New test.
-rw-r--r--gcc/common/config/aarch64/aarch64-common.c7
-rw-r--r--gcc/config/aarch64/aarch64-arches.def1
-rw-r--r--gcc/config/aarch64/aarch64-c.c3
-rw-r--r--gcc/config/aarch64/aarch64.h5
-rw-r--r--gcc/doc/invoke.texi1
-rw-r--r--gcc/testsuite/gcc.target/aarch64/acle/armv8-r.c6
6 files changed, 20 insertions, 3 deletions
diff --git a/gcc/common/config/aarch64/aarch64-common.c b/gcc/common/config/aarch64/aarch64-common.c
index 51bd319..909006e 100644
--- a/gcc/common/config/aarch64/aarch64-common.c
+++ b/gcc/common/config/aarch64/aarch64-common.c
@@ -426,8 +426,11 @@ aarch64_get_extension_string_for_isa_flags (uint64_t isa_flags,
names. However as a special case if CRC was enabled before, always print
it. This is required because some CPUs have an incorrect specification
in older assemblers. Even though CRC should be the default for these
- cases the -mcpu values won't turn it on. */
- if (isa_flags & AARCH64_ISA_CRC)
+ cases the -mcpu values won't turn it on.
+
+ Note that assemblers with Armv8-R AArch64 support should not have this
+ issue, so we don't need this fix when targeting Armv8-R. */
+ if ((isa_flags & AARCH64_ISA_CRC) && !AARCH64_ISA_V8_R)
isa_flag_bits |= AARCH64_ISA_CRC;
/* Pass Two:
diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
index 3be55fa..389084f 100644
--- a/gcc/config/aarch64/aarch64-arches.def
+++ b/gcc/config/aarch64/aarch64-arches.def
@@ -37,5 +37,6 @@ AARCH64_ARCH("armv8.3-a", generic, 8_3A, 8, AARCH64_FL_FOR_ARCH8_3)
AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4)
AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5)
AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6)
+AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R)
#undef AARCH64_ARCH
diff --git a/gcc/config/aarch64/aarch64-c.c b/gcc/config/aarch64/aarch64-c.c
index fd08be4..69691b3 100644
--- a/gcc/config/aarch64/aarch64-c.c
+++ b/gcc/config/aarch64/aarch64-c.c
@@ -63,7 +63,8 @@ aarch64_define_unconditional_macros (cpp_reader *pfile)
as interoperability with the same arm macro. */
builtin_define ("__ARM_ARCH_8A");
- builtin_define_with_int_value ("__ARM_ARCH_PROFILE", 'A');
+ builtin_define_with_int_value ("__ARM_ARCH_PROFILE",
+ AARCH64_ISA_V8_R ? 'R' : 'A');
builtin_define ("__ARM_FEATURE_CLZ");
builtin_define ("__ARM_FEATURE_IDIV");
builtin_define ("__ARM_FEATURE_UNALIGNED");
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index d3e89d1..00b5f84 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -161,6 +161,8 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_FL_LSE (1 << 4) /* Has Large System Extensions. */
#define AARCH64_FL_RDMA (1 << 5) /* Has Round Double Multiply Add. */
#define AARCH64_FL_V8_1 (1 << 6) /* Has ARMv8.1-A extensions. */
+/* Armv8-R. */
+#define AARCH64_FL_V8_R (1 << 7) /* Armv8-R AArch64. */
/* ARMv8.2-A architecture extensions. */
#define AARCH64_FL_V8_2 (1 << 8) /* Has ARMv8.2-A features. */
#define AARCH64_FL_F16 (1 << 9) /* Has ARMv8.2-A FP16 extensions. */
@@ -246,6 +248,8 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_FL_FOR_ARCH8_6 \
(AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_V8_6 | AARCH64_FL_FPSIMD \
| AARCH64_FL_I8MM | AARCH64_FL_BF16)
+#define AARCH64_FL_FOR_ARCH8_R \
+ (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
/* Macros to test ISA flags. */
@@ -282,6 +286,7 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_ISA_F64MM (aarch64_isa_flags & AARCH64_FL_F64MM)
#define AARCH64_ISA_BF16 (aarch64_isa_flags & AARCH64_FL_BF16)
#define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB)
+#define AARCH64_ISA_V8_R (aarch64_isa_flags & AARCH64_FL_V8_R)
/* Crypto is an optional extension to AdvSIMD. */
#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 070445a..ebd8d73 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -17344,6 +17344,7 @@ and the features that they enable by default:
@item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+fp16fml}, @samp{+dotprod}
@item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres}
@item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm}
+@item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
@end multitable
The value @samp{native} is available on native AArch64 GNU/Linux and
diff --git a/gcc/testsuite/gcc.target/aarch64/acle/armv8-r.c b/gcc/testsuite/gcc.target/aarch64/acle/armv8-r.c
new file mode 100644
index 0000000..2866168
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/armv8-r.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-r" } */
+
+#if __ARM_ARCH_PROFILE != 'R'
+#error ACLE architecture profile macro incorrect
+#endif