fp16-compile-alt-1.c: New.

2009-06-18  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/testsuite/
	* gcc.target/arm/fp16-compile-alt-1.c: New.
	* gcc.target/arm/fp16-compile-alt-2.c: New.
	* gcc.target/arm/fp16-compile-alt-3.c: New.
	* gcc.target/arm/fp16-compile-alt-4.c: New.
	* gcc.target/arm/fp16-compile-alt-5.c: New.
	* gcc.target/arm/fp16-compile-alt-6.c: New.
	* gcc.target/arm/fp16-compile-alt-7.c: New.
	* gcc.target/arm/fp16-compile-alt-8.c: New.
	* gcc.target/arm/fp16-compile-alt-9.c: New.
	* gcc.target/arm/fp16-compile-alt-10.c: New.
	* gcc.target/arm/fp16-compile-alt-11.c: New.
	* gcc.target/arm/fp16-compile-ieee-1.c: New.
	* gcc.target/arm/fp16-compile-ieee-2.c: New.
	* gcc.target/arm/fp16-compile-ieee-3.c: New.
	* gcc.target/arm/fp16-compile-ieee-4.c: New.
	* gcc.target/arm/fp16-compile-ieee-5.c: New.
	* gcc.target/arm/fp16-compile-ieee-6.c: New.
	* gcc.target/arm/fp16-compile-ieee-7.c: New.
	* gcc.target/arm/fp16-compile-ieee-8.c: New.
	* gcc.target/arm/fp16-compile-ieee-9.c: New.
	* gcc.target/arm/fp16-compile-ieee-10.c: New.
	* gcc.target/arm/fp16-compile-ieee-11.c: New.
	* gcc.target/arm/fp16-compile-none-1.c: New.
	* gcc.target/arm/fp16-compile-exprtype.c: New.
	* gcc.target/arm/fp16-compile-vcvt.c: New.
	* gcc.target/arm/fp16-builtins-1.c: New.
	* gcc.target/arm/fp16-rounding-alt-1.c: New.
	* gcc.target/arm/fp16-rounding-ieee-1.c: New.
	* gcc.target/arm/fp16-param-1.c: New.
	* gcc.target/arm/fp16-return-1.c: New.
	* gcc.target/arm/fp16-unprototyped-1.c: New.
	* gcc.target/arm/fp16-unprototyped-2.c: New.
	* gcc.target/arm/fp16-variadic-1.c: New.
	* gcc.dg/torture/arm-fp16-compile-assign.c: New.
	* gcc.dg/torture/arm-fp16-compile-convert.c: New.
	* gcc.dg/torture/arm-fp16-int-convert-alt.c: New.
	* gcc.dg/torture/arm-fp16-int-convert-ieee.c: New.
	* gcc.dg/torture/arm-fp16-ops.h: New.
	* gcc.dg/torture/arm-fp16-ops-1.c: New.
	* gcc.dg/torture/arm-fp16-ops-2.c: New.
	* gcc.dg/torture/arm-fp16-ops-3.c: New.
	* gcc.dg/torture/arm-fp16-ops-4.c: New.
	* gcc.dg/torture/arm-fp16-ops-5.c: New.
	* gcc.dg/torture/arm-fp16-ops-6.c: New.
	* gcc.dg/torture/arm-fp16-ops-7.c: New.
	* gcc.dg/torture/arm-fp16-ops-8.c: New.
	* g++.dg/ext/arm-fp16/fp16-overload-1.C: New.
	* g++.dg/ext/arm-fp16/fp16-return-1.C: New.
	* g++.dg/ext/arm-fp16/fp16-param-1.C: New.
	* g++.dg/ext/arm-fp16/fp16-mangle-1.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops.h: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-1.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-2.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-5.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-7.C: New.
	* g++.dg/ext/arm-fp16/arm-fp16-ops-8.C: New.

From-SVN: r148656

60 files changed, 1171 insertions, 0 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e0d1f6f..09565f5 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,65 @@
+2009-06-18  Sandra Loosemore  <sandra@codesourcery.com>
+
+	* gcc.target/arm/fp16-compile-alt-1.c: New.
+	* gcc.target/arm/fp16-compile-alt-2.c: New.
+	* gcc.target/arm/fp16-compile-alt-3.c: New.
+	* gcc.target/arm/fp16-compile-alt-4.c: New.
+	* gcc.target/arm/fp16-compile-alt-5.c: New.
+	* gcc.target/arm/fp16-compile-alt-6.c: New.
+	* gcc.target/arm/fp16-compile-alt-7.c: New.
+	* gcc.target/arm/fp16-compile-alt-8.c: New.
+	* gcc.target/arm/fp16-compile-alt-9.c: New.
+	* gcc.target/arm/fp16-compile-alt-10.c: New.
+	* gcc.target/arm/fp16-compile-alt-11.c: New.
+	* gcc.target/arm/fp16-compile-ieee-1.c: New.
+	* gcc.target/arm/fp16-compile-ieee-2.c: New.
+	* gcc.target/arm/fp16-compile-ieee-3.c: New.
+	* gcc.target/arm/fp16-compile-ieee-4.c: New.
+	* gcc.target/arm/fp16-compile-ieee-5.c: New.
+	* gcc.target/arm/fp16-compile-ieee-6.c: New.
+	* gcc.target/arm/fp16-compile-ieee-7.c: New.
+	* gcc.target/arm/fp16-compile-ieee-8.c: New.
+	* gcc.target/arm/fp16-compile-ieee-9.c: New.
+	* gcc.target/arm/fp16-compile-ieee-10.c: New.
+	* gcc.target/arm/fp16-compile-ieee-11.c: New.
+	* gcc.target/arm/fp16-compile-none-1.c: New.
+	* gcc.target/arm/fp16-compile-exprtype.c: New.
+	* gcc.target/arm/fp16-compile-vcvt.c: New.
+	* gcc.target/arm/fp16-builtins-1.c: New.
+	* gcc.target/arm/fp16-rounding-alt-1.c: New.
+	* gcc.target/arm/fp16-rounding-ieee-1.c: New.
+	* gcc.target/arm/fp16-param-1.c: New.
+	* gcc.target/arm/fp16-return-1.c: New.
+	* gcc.target/arm/fp16-unprototyped-1.c: New.
+	* gcc.target/arm/fp16-unprototyped-2.c: New.
+	* gcc.target/arm/fp16-variadic-1.c: New.
+	* gcc.dg/torture/arm-fp16-compile-assign.c: New.
+	* gcc.dg/torture/arm-fp16-compile-convert.c: New.
+	* gcc.dg/torture/arm-fp16-int-convert-alt.c: New.
+	* gcc.dg/torture/arm-fp16-int-convert-ieee.c: New.
+	* gcc.dg/torture/arm-fp16-ops.h: New.
+	* gcc.dg/torture/arm-fp16-ops-1.c: New.
+	* gcc.dg/torture/arm-fp16-ops-2.c: New.
+	* gcc.dg/torture/arm-fp16-ops-3.c: New.
+	* gcc.dg/torture/arm-fp16-ops-4.c: New.
+	* gcc.dg/torture/arm-fp16-ops-5.c: New.
+	* gcc.dg/torture/arm-fp16-ops-6.c: New.
+	* gcc.dg/torture/arm-fp16-ops-7.c: New.
+	* gcc.dg/torture/arm-fp16-ops-8.c: New.
+	* g++.dg/ext/arm-fp16/fp16-overload-1.C: New.
+	* g++.dg/ext/arm-fp16/fp16-return-1.C: New.
+	* g++.dg/ext/arm-fp16/fp16-param-1.C: New.
+	* g++.dg/ext/arm-fp16/fp16-mangle-1.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops.h: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-1.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-2.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-5.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-7.C: New.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-8.C: New.
+
 2009-06-18  Uros Bizjak  <ubizjak@gmail.com>
 
 	* gcc.dg/builtins-65.c: New test.
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-1.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-1.C
new file mode 100644
index 0000000..0c601e6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-1.C
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-2.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-2.C
new file mode 100644
index 0000000..244e310
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-2.C
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee -ffast-math" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
new file mode 100644
index 0000000..8f9ab64
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-3.C
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
new file mode 100644
index 0000000..4877f39
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-4.C
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative -ffast-math" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C
new file mode 100644
index 0000000..6bc4cf6
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+   we should not see any calls to libfuncs here.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
new file mode 100644
index 0000000..9401a59
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+   we should not see any calls to libfuncs here.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C
new file mode 100644
index 0000000..debc193
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any 
+   calls to libfuncs here except for those to the conversion functions.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C
new file mode 100644
index 0000000..a6e7238
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any 
+   calls to libfuncs here except for those to the conversion functions.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h
new file mode 100644
index 0000000..320494e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops.h
@@ -0,0 +1,135 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+
+#include <assert.h>
+
+#define CHECK(e,r) assert ((e) == r)
+#define CHECK2(e,r) (assert ((e) == r), temp = (e), assert (temp == r))
+#define TEST(e) assert (e)
+#define TESTNOT(e) assert (!(e))
+
+volatile __fp16 h0 = 0.0;
+volatile __fp16 h1 = 1.0;
+volatile __fp16 h42 = 42.0;
+volatile __fp16 hm2 = -2.0;
+volatile __fp16 temp;
+
+volatile float f0 = 0.0;
+volatile float f1 = 1.0;
+volatile float f42 = 42.0;
+volatile float fm2 = -2.0;
+
+int main (void)
+{
+  TEST (h1);
+  TESTNOT (h0);
+  TEST (!h0);
+  TESTNOT (!h1);
+
+  CHECK2 (-h1, -1.0);
+  CHECK2 (+h1, 1.0);
+
+  CHECK (h1++, 1.0);
+  CHECK (h1, 2.0);
+  CHECK (++h1, 3.0);
+  CHECK (h1, 3.0);
+
+  CHECK (--h1, 2.0);
+  CHECK (h1, 2.0);
+  CHECK (h1--, 2.0);
+  CHECK (h1, 1.0);
+
+  CHECK2 (h42 * hm2, -84.0);
+  CHECK2 (h42 * (__fp16) -2.0, -84.0);
+  CHECK2 (h42 * fm2, -84.0);
+  CHECK2 (f42 * hm2, -84.0);
+
+  CHECK2 (h42 / hm2, -21.0);
+  CHECK2 (h42 / (__fp16) -2.0, -21.0);
+  CHECK2 (h42 / fm2, -21.0);
+  CHECK2 (f42 / hm2, -21.0);
+
+  CHECK2 (hm2 + h42, 40.0);
+  CHECK2 ((__fp16)-2.0 + h42, 40.0);
+  CHECK2 (hm2 + f42, 40.0);
+  CHECK2 (fm2 + h42, 40.0);
+
+  CHECK2 (hm2 - h42, -44.0);
+  CHECK2 ((__fp16)-2.0 - h42, -44.0);
+  CHECK2 (hm2 - f42, -44.0);
+  CHECK2 (fm2 - h42, -44.0);
+
+  TEST (hm2 < h42);
+  TEST (hm2 < (__fp16)42.0);
+  TEST (hm2 < f42);
+  TEST (fm2 < h42);
+
+  TEST (h42 > hm2);
+  TEST ((__fp16)42.0 > hm2);
+  TEST (h42 > fm2);
+  TEST (f42 > hm2);
+
+  TEST (hm2 <= h42);
+  TEST (hm2 <= (__fp16)42.0);
+  TEST (hm2 <= f42);
+  TEST (fm2 <= h42);
+
+  TEST (h42 >= hm2);
+  TEST (h42 >= (__fp16)-2.0);
+  TEST (h42 >= fm2);
+  TEST (f42 >= hm2);
+
+  TESTNOT (h1 == hm2);
+  TEST (h1 == h1);
+  TEST (h1 == (__fp16)1.0);
+  TEST (h1 == f1);
+  TEST (f1 == h1);
+
+  TEST (h1 != hm2);
+  TESTNOT (h1 != h1);
+  TESTNOT (h1 != (__fp16)1.0);
+  TESTNOT (h1 != f1);
+  TESTNOT (f1 != h1);
+
+  CHECK2 ((h1 ? hm2 : h42), -2.0);
+  CHECK2 ((h0 ? hm2 : h42), 42.0);
+
+  CHECK (h0 = h42, 42.0);
+  CHECK (h0, 42.0);
+  CHECK (h0 = (__fp16)-2.0, -2.0);
+  CHECK (h0, -2.0);
+  CHECK (h0 = f0, 0.0);
+  CHECK (h0, 0.0);
+
+  CHECK (h0 += h1, 1.0);
+  CHECK (h0, 1.0);
+  CHECK (h0 += (__fp16)1.0, 2.0);
+  CHECK (h0, 2.0);
+  CHECK (h0 += fm2, 0.0);
+  CHECK (h0, 0.0);
+
+  CHECK (h0 -= h1, -1.0);
+  CHECK (h0, -1.0);
+  CHECK (h0 -= (__fp16)1.0, -2.0);
+  CHECK (h0, -2.0);
+  CHECK (h0 -= fm2, 0.0);
+  CHECK (h0, 0.0);
+
+  h0 = hm2;
+  CHECK (h0 *= hm2, 4.0);
+  CHECK (h0, 4.0);
+  CHECK (h0 *= (__fp16)-2.0, -8.0);
+  CHECK (h0, -8.0);
+  CHECK (h0 *= fm2, 16.0);
+  CHECK (h0, 16.0);
+
+  CHECK (h0 /= hm2, -8.0);
+  CHECK (h0, -8.0);
+  CHECK (h0 /= (__fp16)-2.0, 4.0);
+  CHECK (h0, 4.0);
+  CHECK (h0 /= fm2, -2.0);
+  CHECK (h0, -2.0);
+
+  CHECK ((h0, h1), 1.0);
+
+  return 0;
+}
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-mangle-1.C b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-mangle-1.C
new file mode 100644
index 0000000..25a872a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-mangle-1.C
@@ -0,0 +1,14 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Test mangling */
+
+/* { dg-final { scan-assembler "\t.global\t_Z1fPDh" } } */
+void f (__fp16 *x) { }
+
+/* { dg-final { scan-assembler "\t.global\t_Z1gPDhS_" } } */
+void g (__fp16 *x, __fp16 *y) { }
+
+/* { dg-final { scan-assembler "\t.global\t_ZN1SIDhDhE1iE" } } */
+template <typename T, typename U> struct S { static int i; }; 
+template <> int S<__fp16, __fp16>::i = 3;
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-overload-1.C b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-overload-1.C
new file mode 100644
index 0000000..bf0139d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-overload-1.C
@@ -0,0 +1,16 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* __fp16 values are autoconverted to float and should therefore be treated
+ * just like float for overloading purposes.  */
+
+extern int frobnify (float x);
+extern int frobnify (double x);
+
+int g (void)
+{
+  return frobnify ((__fp16)1.0);
+}
+
+/* { dg-final { scan-assembler "_Z8frobnifyf" } } */
+/* { dg-final { scan-assembler-not " _Z8frobnifyd" } } */
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-param-1.C b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-param-1.C
new file mode 100644
index 0000000..03feb1a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-param-1.C
@@ -0,0 +1,10 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot have parameters of type __fp16.  */
+extern void f (__fp16);		/* { dg-error "parameters cannot have __fp16 type" } */
+extern void (*pf) (__fp16);	/* { dg-error "parameters cannot have __fp16 type" } */
+
+/* These should be OK.  */
+extern void g (__fp16 *);
+extern void (*pg) (__fp16 *);
diff --git a/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-return-1.C b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-return-1.C
new file mode 100644
index 0000000..406dfac
--- /dev/null
+++ b/gcc/testsuite/g++.dg/ext/arm-fp16/fp16-return-1.C
@@ -0,0 +1,10 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot return type __fp16.  */
+extern __fp16 f (void);		/* { dg-error "cannot return __fp16" } */
+extern __fp16 (*pf) (void);	/* { dg-error "cannot return __fp16" } */
+
+/* These should be OK.  */
+extern __fp16 *g (void);
+extern __fp16 *(*pg) (void);
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-assign.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-assign.c
new file mode 100644
index 0000000..d6143d2
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-assign.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Test basic assignments and conversions for __fp16.  */
+
+__fp16 h0 = -1.0;
+__fp16 h1 = 0.0;
+__fp16 h2 = 1234.0;
+__fp16 h3 = 42.0;
+float f1 = 2.0;
+float f2 = -999.9;
+
+void f (__fp16 *p)
+{
+  __fp16 t;
+
+  h0 = 1.0;
+  h1 = h2;
+  h2 = f1;
+  f2 = h2;
+
+  t = *p;
+  *p = h3;
+  h3 = t;
+}
+
+/* Make sure we are not falling through to undefined libcalls.  */
+/* { dg-final { scan-assembler-not "__truncsfhf" } } */
+/* { dg-final { scan-assembler-not "__extendhfsf" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-convert.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-convert.c
new file mode 100644
index 0000000..0434195
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-compile-convert.c
@@ -0,0 +1,41 @@
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Test basic assignments and conversions for __fp16.  */
+
+__fp16 h1 = 0.0;
+__fp16 h2 = 1234.0;
+char c1 = 1;
+char c2 = 2;
+short s1 = 10;
+short s2 = 20;
+int i1 = -100;
+int i2 = -200;
+long long l1 = 1000.0;
+long long l2 = 2000.0;
+double d1 = -10000.0;
+double d2 = -20000.0;
+
+void f (void)
+{
+  c1 = h1;
+  h2 = c2;
+
+  h1 = s1;
+  s2 = h2;
+
+  i1 = h1;
+  h2 = i2;
+
+  h1 = l1;
+  l2 = h2;
+  
+  d1 = h1;
+  h2 = d2;
+}
+
+/* Make sure we are not falling through to undefined libcalls.  */
+/* { dg-final { scan-assembler-not "__float.ihf" } } */
+/* { dg-final { scan-assembler-not "__fixhf.i" } } */
+/* { dg-final { scan-assembler-not "__trunc.fhf" } } */
+/* { dg-final { scan-assembler-not "__extendhf.f" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
new file mode 100644
index 0000000..bcd7aeff
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-alt.c
@@ -0,0 +1,17 @@
+/* Test floating-point conversions.  Standard types and __fp16.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+#include "fp-int-convert.h"
+#define FP16_MANT_DIG 11
+
+int
+main (void)
+{
+  TEST_I_F(signed char, unsigned char, float, FP16_MANT_DIG);
+  TEST_I_F(signed short, unsigned short, float, FP16_MANT_DIG);
+  TEST_I_F(signed int, unsigned int, float, FP16_MANT_DIG);
+  TEST_I_F(signed long, unsigned long, float, FP16_MANT_DIG);
+  TEST_I_F(signed long long, unsigned long long, float, FP16_MANT_DIG);
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-ieee.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-ieee.c
new file mode 100644
index 0000000..1314d4b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-int-convert-ieee.c
@@ -0,0 +1,17 @@
+/* Test floating-point conversions.  Standard types and __fp16.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include "fp-int-convert.h"
+#define FP16_MANT_DIG 11
+
+int
+main (void)
+{
+  TEST_I_F(signed char, unsigned char, float, FP16_MANT_DIG);
+  TEST_I_F(signed short, unsigned short, float, FP16_MANT_DIG);
+  TEST_I_F(signed int, unsigned int, float, FP16_MANT_DIG);
+  TEST_I_F(signed long, unsigned long, float, FP16_MANT_DIG);
+  TEST_I_F(signed long long, unsigned long long, float, FP16_MANT_DIG);
+  exit (0);
+}
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c
new file mode 100644
index 0000000..0c601e6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-1.c
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-2.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-2.c
new file mode 100644
index 0000000..244e310
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-2.c
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=ieee -ffast-math" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
new file mode 100644
index 0000000..8f9ab64
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
new file mode 100644
index 0000000..4877f39
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c
@@ -0,0 +1,5 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do run { target arm*-*-* } } */
+/* { dg-options "-mfp16-format=alternative -ffast-math" } */
+
+#include "arm-fp16-ops.h"
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c
new file mode 100644
index 0000000..6bc4cf6
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+   we should not see any calls to libfuncs here.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c
new file mode 100644
index 0000000..9401a59
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c
@@ -0,0 +1,14 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, including fp16 support, so
+   we should not see any calls to libfuncs here.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c
new file mode 100644
index 0000000..debc193
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any 
+   calls to libfuncs here except for those to the conversion functions.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c
new file mode 100644
index 0000000..a6e7238
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c
@@ -0,0 +1,12 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+/* { dg-do compile { target arm*-*-* } } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon -mfloat-abi=softfp" } */
+
+#include "arm-fp16-ops.h"
+
+/* We've specified options for hardware float, so we should not see any 
+   calls to libfuncs here except for those to the conversion functions.  */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf2" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__.*hf3" } } */
+/* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h
new file mode 100644
index 0000000..320494e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/arm-fp16-ops.h
@@ -0,0 +1,135 @@
+/* Test various operators on __fp16 and mixed __fp16/float operands.  */
+
+#include <assert.h>
+
+#define CHECK(e,r) assert ((e) == r)
+#define CHECK2(e,r) (assert ((e) == r), temp = (e), assert (temp == r))
+#define TEST(e) assert (e)
+#define TESTNOT(e) assert (!(e))
+
+volatile __fp16 h0 = 0.0;
+volatile __fp16 h1 = 1.0;
+volatile __fp16 h42 = 42.0;
+volatile __fp16 hm2 = -2.0;
+volatile __fp16 temp;
+
+volatile float f0 = 0.0;
+volatile float f1 = 1.0;
+volatile float f42 = 42.0;
+volatile float fm2 = -2.0;
+
+int main (void)
+{
+  TEST (h1);
+  TESTNOT (h0);
+  TEST (!h0);
+  TESTNOT (!h1);
+
+  CHECK2 (-h1, -1.0);
+  CHECK2 (+h1, 1.0);
+
+  CHECK (h1++, 1.0);
+  CHECK (h1, 2.0);
+  CHECK (++h1, 3.0);
+  CHECK (h1, 3.0);
+
+  CHECK (--h1, 2.0);
+  CHECK (h1, 2.0);
+  CHECK (h1--, 2.0);
+  CHECK (h1, 1.0);
+
+  CHECK2 (h42 * hm2, -84.0);
+  CHECK2 (h42 * (__fp16) -2.0, -84.0);
+  CHECK2 (h42 * fm2, -84.0);
+  CHECK2 (f42 * hm2, -84.0);
+
+  CHECK2 (h42 / hm2, -21.0);
+  CHECK2 (h42 / (__fp16) -2.0, -21.0);
+  CHECK2 (h42 / fm2, -21.0);
+  CHECK2 (f42 / hm2, -21.0);
+
+  CHECK2 (hm2 + h42, 40.0);
+  CHECK2 ((__fp16)-2.0 + h42, 40.0);
+  CHECK2 (hm2 + f42, 40.0);
+  CHECK2 (fm2 + h42, 40.0);
+
+  CHECK2 (hm2 - h42, -44.0);
+  CHECK2 ((__fp16)-2.0 - h42, -44.0);
+  CHECK2 (hm2 - f42, -44.0);
+  CHECK2 (fm2 - h42, -44.0);
+
+  TEST (hm2 < h42);
+  TEST (hm2 < (__fp16)42.0);
+  TEST (hm2 < f42);
+  TEST (fm2 < h42);
+
+  TEST (h42 > hm2);
+  TEST ((__fp16)42.0 > hm2);
+  TEST (h42 > fm2);
+  TEST (f42 > hm2);
+
+  TEST (hm2 <= h42);
+  TEST (hm2 <= (__fp16)42.0);
+  TEST (hm2 <= f42);
+  TEST (fm2 <= h42);
+
+  TEST (h42 >= hm2);
+  TEST (h42 >= (__fp16)-2.0);
+  TEST (h42 >= fm2);
+  TEST (f42 >= hm2);
+
+  TESTNOT (h1 == hm2);
+  TEST (h1 == h1);
+  TEST (h1 == (__fp16)1.0);
+  TEST (h1 == f1);
+  TEST (f1 == h1);
+
+  TEST (h1 != hm2);
+  TESTNOT (h1 != h1);
+  TESTNOT (h1 != (__fp16)1.0);
+  TESTNOT (h1 != f1);
+  TESTNOT (f1 != h1);
+
+  CHECK2 ((h1 ? hm2 : h42), -2.0);
+  CHECK2 ((h0 ? hm2 : h42), 42.0);
+
+  CHECK (h0 = h42, 42.0);
+  CHECK (h0, 42.0);
+  CHECK (h0 = (__fp16)-2.0, -2.0);
+  CHECK (h0, -2.0);
+  CHECK (h0 = f0, 0.0);
+  CHECK (h0, 0.0);
+
+  CHECK (h0 += h1, 1.0);
+  CHECK (h0, 1.0);
+  CHECK (h0 += (__fp16)1.0, 2.0);
+  CHECK (h0, 2.0);
+  CHECK (h0 += fm2, 0.0);
+  CHECK (h0, 0.0);
+
+  CHECK (h0 -= h1, -1.0);
+  CHECK (h0, -1.0);
+  CHECK (h0 -= (__fp16)1.0, -2.0);
+  CHECK (h0, -2.0);
+  CHECK (h0 -= fm2, 0.0);
+  CHECK (h0, 0.0);
+
+  h0 = hm2;
+  CHECK (h0 *= hm2, 4.0);
+  CHECK (h0, 4.0);
+  CHECK (h0 *= (__fp16)-2.0, -8.0);
+  CHECK (h0, -8.0);
+  CHECK (h0 *= fm2, 16.0);
+  CHECK (h0, 16.0);
+
+  CHECK (h0 /= hm2, -8.0);
+  CHECK (h0, -8.0);
+  CHECK (h0 /= (__fp16)-2.0, 4.0);
+  CHECK (h0, 4.0);
+  CHECK (h0 /= fm2, -2.0);
+  CHECK (h0, -2.0);
+
+  CHECK ((h0, h1), 1.0);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-builtins-1.c b/gcc/testsuite/gcc.target/arm/fp16-builtins-1.c
new file mode 100644
index 0000000..8687680
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-builtins-1.c
@@ -0,0 +1,92 @@
+/* Test type-generic builtins with __fp16 arguments.
+   Except as otherwise noted, they should behave exactly
+   the same as those with float arguments.  */
+
+/* { dg-do run } */
+/* { dg-options "-mfp16-format=ieee -std=gnu99" } */
+
+#include <stdlib.h>
+#include <math.h>
+
+volatile __fp16 h1, h2;
+volatile float f1, f2;
+
+void
+set1 (double x)
+{
+  h1 = x;
+  f1 = h1;
+}
+
+void
+set2 (double x, double y)
+{
+  h1 = x;
+  f1 = h1;
+  h2 = y;
+  f2 = h2;
+}
+
+#define test1(p,x)				\
+  set1 (x);					\
+  hp = (p (h1) ? 1 : 0);			\
+  fp = (p (f1) ? 1 : 0);			\
+  if (hp ^ fp) abort ()
+
+#define test2(p,x,y)				\
+  set2 (x,y);					\
+  hp = (p (h1, h2) ? 1 : 0);			\
+  fp = (p (f1, f2) ? 1 : 0);			\
+  if (hp ^ fp) abort ()
+
+int
+main (void)
+{
+  int hp, fp;
+
+  test1 (__builtin_isfinite, 17.0);
+  test1 (__builtin_isfinite, INFINITY);
+  test1 (__builtin_isinf, -0.5);
+  test1 (__builtin_isinf, INFINITY);
+  test1 (__builtin_isnan, 493.0);
+  test1 (__builtin_isnan, NAN);
+  test1 (__builtin_isnormal, 3.14159);
+
+  test2 (__builtin_isgreater, 5.0, 3.0);
+  test2 (__builtin_isgreater, 3.0, 5.0);
+  test2 (__builtin_isgreater, 73.5, 73.5);
+  test2 (__builtin_isgreater, 1.0, NAN);
+
+  test2 (__builtin_isgreaterequal, 5.0, 3.0);
+  test2 (__builtin_isgreaterequal, 3.0, 5.0);
+  test2 (__builtin_isgreaterequal, 73.5, 73.5);
+  test2 (__builtin_isgreaterequal, 1.0, NAN);
+
+  test2 (__builtin_isless, 5.0, 3.0);
+  test2 (__builtin_isless, 3.0, 5.0);
+  test2 (__builtin_isless, 73.5, 73.5);
+  test2 (__builtin_isless, 1.0, NAN);
+
+  test2 (__builtin_islessequal, 5.0, 3.0);
+  test2 (__builtin_islessequal, 3.0, 5.0);
+  test2 (__builtin_islessequal, 73.5, 73.5);
+  test2 (__builtin_islessequal, 1.0, NAN);
+
+  test2 (__builtin_islessgreater, 5.0, 3.0);
+  test2 (__builtin_islessgreater, 3.0, 5.0);
+  test2 (__builtin_islessgreater, 73.5, 73.5);
+  test2 (__builtin_islessgreater, 1.0, NAN);
+
+  test2 (__builtin_isunordered, 5.0, 3.0);
+  test2 (__builtin_isunordered, 3.0, 5.0);
+  test2 (__builtin_isunordered, 73.5, 73.5);
+  test2 (__builtin_isunordered, 1.0, NAN);
+
+  /* Test that __builtin_isnormal recognizes a denormalized __fp16 value,
+     even if it's representable as a normalized float.  */
+  h1 = 5.96046E-8;
+  if (__builtin_isnormal (h1))
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
new file mode 100644
index 0000000..3abcd94
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+__fp16 xx = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 2" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
new file mode 100644
index 0000000..2e3d31f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-10.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
+
+#include <math.h>
+
+/* NaNs are not representable in the alternative format; we should get a
+   diagnostic.  */
+__fp16 xx = NAN; /* { dg-warning "overflow" } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
new file mode 100644
index 0000000..62a7a3d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-11.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative -pedantic -std=gnu99" } */
+
+#include <math.h>
+
+/* Infinities are not representable in the alternative format;
+   we should get a diagnostic, and the value set to the largest
+   representable value.  */
+/* 0x7fff = 32767 */
+__fp16 xx = INFINITY; /* { dg-warning "overflow" } */
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t32767" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
new file mode 100644
index 0000000..b7fe99d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x3c00 = 15360 */
+__fp16 xx = 1.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t15360" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
new file mode 100644
index 0000000..f325a84
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0xc000 = 49152 */
+__fp16 xx = -2.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t49152" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
new file mode 100644
index 0000000..4b9b331
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-4.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x7bff = 31743 */
+__fp16 xx = 65504.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t31743" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
new file mode 100644
index 0000000..458f507
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-5.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x3555 = 13653 */
+__fp16 xx = (1.0/3.0);
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t13653" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
new file mode 100644
index 0000000..dbb4a99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-6.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* This number is the maximum value representable in the alternative
+   encoding.  */
+/* 0x7fff = 32767 */
+__fp16 xx = 131008.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t32767" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
new file mode 100644
index 0000000..40940a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-7.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative -pedantic" } */
+
+/* This number overflows the range of the alternative encoding.  Since this
+   encoding doesn't have infinities, we should get a pedantic warning,
+   and the value should be set to the largest representable value.  */
+/* 0x7fff = 32767 */
+__fp16 xx = 123456789.0;  /* { dg-warning "overflow" } */
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t32767" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
new file mode 100644
index 0000000..cbc0a39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This is the minimum normalized value.  */
+/* 0x0400 = 1024 */
+__fp16 xx = 6.10352E-5;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t1024" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
new file mode 100644
index 0000000..6487c8d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-alt-9.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This is the minimum denormalized value.  */
+/* 0x0001 = 1 */
+__fp16 xx = 5.96046E-8;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-exprtype.c b/gcc/testsuite/gcc.target/arm/fp16-compile-exprtype.c
new file mode 100644
index 0000000..1d8953b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-exprtype.c
@@ -0,0 +1,29 @@
+/* Test that expressions involving __fp16 values have the right types.  */
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* This produces a diagnostic if EXPR doesn't have type TYPE.  */
+#define CHECK(expr,type)			\
+  do {						\
+    type v;					\
+    __typeof (expr) *p = &v;			\
+  } while (0);
+
+volatile __fp16 f1;
+volatile __fp16 f2;
+
+int
+main (void)
+{
+  CHECK (f1, __fp16);
+  CHECK (+f1, float);
+  CHECK (-f1, float);
+  CHECK (f1+f2, float);
+  CHECK ((__fp16)(f1+f2), __fp16);
+  CHECK ((__fp16)99.99, __fp16);
+  CHECK ((f1+f2, f1), __fp16);
+}
+
+
+
+
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-1.c
new file mode 100644
index 0000000..d5d0ba2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+__fp16 xx = 0.0;
+
+/* { dg-final { scan-assembler "\t.eabi_attribute 38, 1" } } */
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.space\t2" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-10.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-10.c
new file mode 100644
index 0000000..5160437
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-10.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee -std=gnu99" } */
+
+#include <math.h>
+
+/* 0x7e00 = 32256 */
+__fp16 xx = NAN;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t32256" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-11.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-11.c
new file mode 100644
index 0000000..afab518b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-11.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee -std=gnu99" } */
+
+#include <math.h>
+
+/* 0x7c00 = 31744 */
+__fp16 xx = INFINITY;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t31744" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-2.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-2.c
new file mode 100644
index 0000000..35f2031
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x3c00 = 15360 */
+__fp16 xx = 1.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t15360" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-3.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-3.c
new file mode 100644
index 0000000..90edd01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-3.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0xc000 = 49152 */
+__fp16 xx = -2.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t49152" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-4.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-4.c
new file mode 100644
index 0000000..20676d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-4.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x7bff = 31743 */
+__fp16 xx = 65504.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t31743" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-5.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-5.c
new file mode 100644
index 0000000..aff9e13
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-5.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* 0x3555 = 13653 */
+__fp16 xx = (1.0/3.0);
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t13653" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-6.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-6.c
new file mode 100644
index 0000000..c736e63
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-6.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This number is too big and is represented as infinity.  */
+/* 0x7c00 = 31744 */
+__fp16 xx = 131008.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t31744" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-7.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-7.c
new file mode 100644
index 0000000..9316377
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-7.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee -pedantic" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This number is too big and is represented as infinity.  */
+/* We should *not* get an overflow warning here.  */
+/* 0x7c00 = 31744 */
+__fp16 xx = 123456789.0;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t31744" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-8.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-8.c
new file mode 100644
index 0000000..a964673
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-8.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This is the minimum normalized value.  */
+/* 0x0400 = 1024 */
+__fp16 xx = 6.10352E-5;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t1024" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-9.c b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-9.c
new file mode 100644
index 0000000..11b31ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-ieee-9.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Encoding taken from:  http://en.wikipedia.org/wiki/Half_precision */
+/* This is the minimum denormalized value.  */
+/* 0x0001 = 1 */
+__fp16 xx = 5.96046E-8;
+
+/* { dg-final { scan-assembler "\t.size\txx, 2" } } */
+/* { dg-final { scan-assembler "\t.short\t1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c b/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c
new file mode 100644
index 0000000..ca29123
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-none-1.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=none" } */
+
+/* __fp16 type name is not recognized unless you explicitly enable it
+   by selecting -mfp16-format=ieee or -mfp16-format=alternative.  */
+__fp16 xx = 0.0;  /* { dg-error "expected" } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c b/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
new file mode 100644
index 0000000..01d1e82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
+
+/* Test generation of VFP __fp16 instructions.  */
+
+__fp16 h1 = 0.0;
+__fp16 h2 = 1234.0;
+float f1 = 2.0;
+float f2 = -999.9;
+
+void f (void)
+{
+  h1 = f1;
+  f2 = h2;
+}
+
+/* { dg-final { scan-assembler "\tvcvtb.f32.f16" } } */
+/* { dg-final { scan-assembler "\tvcvtb.f16.f32" } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-param-1.c b/gcc/testsuite/gcc.target/arm/fp16-param-1.c
new file mode 100644
index 0000000..af4845f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-param-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot have parameters of type __fp16.  */
+extern void f (__fp16);		/* { dg-error "parameters cannot have __fp16 type" } */
+extern void (*pf) (__fp16);	/* { dg-error "parameters cannot have __fp16 type" } */
+
+/* These should be OK.  */
+extern void g (__fp16 *);
+extern void (*pg) (__fp16 *);
diff --git a/gcc/testsuite/gcc.target/arm/fp16-return-1.c b/gcc/testsuite/gcc.target/arm/fp16-return-1.c
new file mode 100644
index 0000000..f763941
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-return-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+/* Functions cannot return type __fp16.  */
+extern __fp16 f (void);		/* { dg-error "cannot return __fp16" } */
+extern __fp16 (*pf) (void);	/* { dg-error "cannot return __fp16" } */
+
+/* These should be OK.  */
+extern __fp16 *g (void);
+extern __fp16 *(*pg) (void);
diff --git a/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
new file mode 100644
index 0000000..f50b447
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-rounding-alt-1.c
@@ -0,0 +1,47 @@
+/* Test intermediate rounding of double to float and then to __fp16, using
+   an example of a number that would round differently if it went directly
+   from double to __fp16.  */
+
+/* { dg-do run } */
+/* { dg-options "-mfp16-format=alternative" } */
+
+#include <stdlib.h>
+
+/* The original double value.  */
+#define ORIG 0x1.0020008p0
+
+/* The expected (double)((__fp16)((float)ORIG)) value.  */
+#define ROUNDED 0x1.0000000p0
+
+typedef union u {
+  __fp16 f;
+  unsigned short h;
+} ufh;
+
+ufh s = { ORIG };
+ufh r = { ROUNDED };
+
+double d = ORIG;
+
+int
+main (void)
+{
+  ufh x;
+
+  /* Test that the rounding is correct for static initializers.  */
+  if (s.h != r.h)
+    abort ();
+
+  /* Test that the rounding is correct for a casted constant expression
+     not in a static initializer.  */
+  x.f = (__fp16)ORIG;
+  if (x.h != r.h)
+    abort ();
+
+  /* Test that the rounding is correct for a runtime conversion.  */
+  x.f = (__fp16)d;
+  if (x.h != r.h)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-rounding-ieee-1.c b/gcc/testsuite/gcc.target/arm/fp16-rounding-ieee-1.c
new file mode 100644
index 0000000..866d4d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-rounding-ieee-1.c
@@ -0,0 +1,47 @@
+/* Test intermediate rounding of double to float and then to __fp16, using
+   an example of a number that would round differently if it went directly
+   from double to __fp16.  */
+
+/* { dg-do run } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include <stdlib.h>
+
+/* The original double value.  */
+#define ORIG 0x1.0020008p0
+
+/* The expected (double)((__fp16)((float)ORIG)) value.  */
+#define ROUNDED 0x1.0000000p0
+
+typedef union u {
+  __fp16 f;
+  unsigned short h;
+} ufh;
+
+ufh s = { ORIG };
+ufh r = { ROUNDED };
+
+double d = ORIG;
+
+int
+main (void)
+{
+  ufh x;
+
+  /* Test that the rounding is correct for static initializers.  */
+  if (s.h != r.h)
+    abort ();
+
+  /* Test that the rounding is correct for a casted constant expression
+     not in a static initializer.  */
+  x.f = (__fp16)ORIG;
+  if (x.h != r.h)
+    abort ();
+
+  /* Test that the rounding is correct for a runtime conversion.  */
+  x.f = (__fp16)d;
+  if (x.h != r.h)
+    abort ();
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-unprototyped-1.c b/gcc/testsuite/gcc.target/arm/fp16-unprototyped-1.c
new file mode 100644
index 0000000..70c2956
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-unprototyped-1.c
@@ -0,0 +1,21 @@
+/* Test promotion of __fp16 to double as arguments to unprototyped
+   function in another compilation unit.  */
+
+/* { dg-do run } */
+/* { dg-options "-mfp16-format=ieee" } */
+/* { dg-additional-sources "fp16-unprototyped-2.c" } */
+
+#include <stdlib.h>
+
+extern int f ();
+
+static __fp16 x = 42.0;
+static __fp16 y = -42.0;
+
+int
+main (void)
+{
+  if (!f (x, y))
+    abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-unprototyped-2.c b/gcc/testsuite/gcc.target/arm/fp16-unprototyped-2.c
new file mode 100644
index 0000000..0c0f9cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-unprototyped-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+extern int f ();
+
+int
+f (double xx, double yy)
+{
+  if (xx == 42.0 && yy == -42.0)
+    return 1;
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/fp16-variadic-1.c b/gcc/testsuite/gcc.target/arm/fp16-variadic-1.c
new file mode 100644
index 0000000..52b4386
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-variadic-1.c
@@ -0,0 +1,37 @@
+/* Test promotion of __fp16 to double as arguments to variadic function.  */
+
+/* { dg-do run } */
+/* { dg-options "-mfp16-format=ieee" } */
+
+#include <stdlib.h>
+#include <stdarg.h>
+
+extern int f (int n, ...);
+
+int 
+f (int n, ...)
+{
+  if (n == 2)
+    {
+      double xx, yy;
+      va_list ap;
+      va_start (ap, n);
+      xx = va_arg (ap, double);
+      yy = va_arg (ap, double);
+      va_end (ap);
+      if (xx == 42.0 && yy == -42.0)
+	return 1;
+    }
+  return 0;
+}
+
+static __fp16 x = 42.0;
+static __fp16 y = -42.0;
+
+int
+main (void)
+{
+  if (!f (2, x, y))
+    abort ();
+  return 0;
+}